MSP3451G データシートの表示（PDF） - Micronas
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MSP3451G Datasheet PDF : 104 Pages
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ANA_IN1+
AGC
ANA_IN2+
ADR-Bus
Interface
A
D
Standard Selection
Automatic
Sound Select
Deemphasis: FM/AM
FM/AM 0
DEMODULATOR 50/75 µs, J17
(incl. Carrier Mute) DBX/MNR
Panda1
Prescale Stereo or A/B 1
(0Ehex)
Decoded
Standards:
− NICAM
− A2
− AM
Deemphasis
J17
NICAM
Prescale
Stereo or A 3
Stereo or B 4
− BTSC
− EIA-J
(10hex)
− SAT
− FM-Radio
Standard
and Sound
I2C
Read
Detection
Register
Loud-
Bass/
speaker
Channel Virtualizer AVC
Treble
or
Σ
Matrix
Equalize
(08hex)
(29hex)
(02hex)
(03hex)
Loud-
ness
(04hex) 0.5
Noise
Generator
Beeper
(14hex)
Comple-
mentary Spatial Balance
Highpass Effects
Volume
(2Dhex)
Lowpass
(2Dhex)
(05hex) (01hex)
Level
Adjust
(2Chex)
MDB
(00hex)
I2S_DA_IN1
I2S_DA_IN2
I2S
Interface
I2S
Interface
I2S1
5
Prescale
(16hex)
I2S2
6
Prescale
(12hex)
A
D
SCART
2
Prescale
(0Dhex)
Headphone
Channel
Matrix
(09hex)
I2S
Channel
Matrix
(0Bhex)
I2S
Interface
Quasi-Peak
Channel
Matrix
Quasi-Peak
Detector
(0Chex)
SCART1
Channel
Matrix
(0Ahex)
Volume
(07hex)
Bass/
Treble
Σ
(31/32hex)
Loudness
(33hex)
I2S_DA_OUT
I2C
Read
Register
(19hex)
(1Ahex)
D
A
SCART1_L/R
SC1_IN_L
SC1_IN_R
SC2_IN_L
SC2_IN_R
SC3_IN_L
SC3_IN_R
SC4_IN_L
SC4_IN_R
MONO_IN
(13hex)
SCART2
Channel
Matrix
(41hex)
Volume
(40hex)
D
A
SCART2_L/R
SC1_OUT_L
SC1_OUT_R
SC2_OUT_L
SC2_OUT_R
(13hex)
Fig. 2–1: Signal flow block diagram of the MSP 34x1G (input and output names correspond to pin names)
Volume
Balance
(30hex)
(06hex)
D
DACM_L
DACM_R
A
DACM_SUB
D
A
DACA_L
DACA_R
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