HN58S65AT-15 データシートの表示（PDF） - Hitachi -> Renesas Electronics

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HN58S65AT-15

64 k EEPROM (8-kword × 8-bit) Ready/Busy function

Hitachi -> Renesas Electronics 

Block Diagram

VCC

VSS

OE

CE

WE

A0

to

A5

A6

to

A12

High voltage generator

Control logic and timing

Address

buffer and

latch

Y decoder

X decoder

Operation Table

Operation

CE

OE

WE

Read

VIL

VIL

VIH

Standby

VIH

×*1

×

Write

VIL

VIH

VIL

Deselect

VIL

VIH

VIH

Write Inhibit

×

×

VIH

×

VIL

×

Data Polling

VIL

VIL

VIH

Notes: 1. × : Don’t care

HN58S65A Series

I/O0 to I/O7

RDY/Busy

I/O buffer

and

input latch

Y gating

Memory array

Data latch

RDY/Busy

High-Z

High-Z

High-Z to VOL

High-Z

—

—

VOL

I/O

Dout

High-Z

Din

High-Z

—

—

Dout (I/O7)

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