MX29LV800CBMC-45 データシートの表示（PDF） - Macronix International

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MX29LV800CBMC-45

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

Macronix International 

MX29LV800C T/B

AUTOMATIC PROGRAMMING

The MX29LV800C T/B is byte programmable using the

Automatic Programming algorithm. The Automatic Pro-

gramming algorithm makes the external system do not

need to have time out sequence nor to verify the data

programmed. The typical chip programming time at room

temperature of the MX29LV800C T/B is less than 10

seconds.

AUTOMATIC PROGRAMMING ALGORITHM

MXIC's Automatic Programming algorithm requires the

user to only write program set-up commands (including

2 unlock write cycle and A0H) and a program command

(program data and address). The device automatically

times the programming pulse width, provides the pro-

gram verification, and counts the number of sequences.

A status bit similar to DATA# polling and a status bit

toggling between consecutive read cycles, provide feed-

back to the user as to the status of the programming

operation. Refer to write operation status, table 8, for more

information on these status bits.

AUTOMATIC CHIP ERASE

The entire chip is bulk erased using 10 ms erase pulses

according to MXIC's Automatic Chip Erase algorithm.

Typical erasure at room temperature is accomplished in

less than 25 second. The Automatic Erase algorithm

automatically programs the entire array prior to electri-

cal erase. The timing and verification of electrical erase

are controlled internally within the device.

AUTOMATIC SECTOR ERASE

The MX29LV800C T/B is sector(s) erasable using MXIC's

Auto Sector Erase algorithm. The Automatic Sector

Erase algorithm automatically programs the specified

sector(s) prior to electrical erase. The timing and verifi-

cation of electrical erase are controlled internally within

the device. An erase operation can erase one sector,

multiple sectors, or the entire device.

AUTOMATIC ERASE ALGORITHM

MXIC's Automatic Erase algorithm requires the user to

write commands to the command register using stan-

dard microprocessor write timings. The device will auto-

matically pre-program and verify the entire array. Then

the device automatically times the erase pulse width,

provides the erase verification, and counts the number of

sequences. A status bit toggling between consecutive

read cycles provides feedback to the user as to the sta-

tus of the erasing operation.

Register contents serve as inputs to an internal state-

machine which controls the erase and programming cir-

cuitry. During write cycles, the command register inter-

nally latches address and data needed for the program-

ming and erase operations. During a system write cycle,

addresses are latched on the falling edge, and data are

latched on the rising edge of WE# or CE#, whichever

happens first.

MXIC's Flash technology combines years of EPROM

experience to produce the highest levels of quality, reli-

ability, and cost effectiveness. The MX29LV800C T/B

electrically erases all bits simultaneously using Fowler-

Nordheim tunneling. The bytes are programmed by us-

ing the EPROM programming mechanism of hot elec-

tron injection.

During a program cycle, the state-machine will control

the program sequences and command register will not

respond to any command set. During a Sector Erase

cycle, the command register will only respond to Erase

Suspend command. After Erase Suspend is completed,

the device stays in read mode. After the state machine

has completed its task, it will allow the command regis-

ter to respond to its full command set.

AUTOMATIC SELECT

The auto select mode provides manufacturer and device

identification, and sector protection verification, through

identifier codes output on Q7~Q0. This mode is mainly

adapted for programming equipment on the device to be

programmed with its programming algorithm. When pro-

gramming by high voltage method, automatic select mode

requires VID (11.5V to 12.5V) on address pin A9 and

other address pin A6, A1 and A0 as referring to Table 3.

In addition, to access the automatic select codes in-sys-

tem, the host can issue the automatic select command

through the command register without requiring VID, as

shown in table 5.

To verify whether or not sector being protected, the sec-

tor address must appear on the appropriate highest order

P/N:PM1183

REV. 1.4, APR. 24, 2006

7

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