NB100LVEP221FARG(2015) データシートの表示（PDF） - ON Semiconductor

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NB100LVEP221FARG
(Rev.:2015)

2.5V/3.3V 2:1:20 Differential HSTL/ECL/PECL Clock Driver

ON Semiconductor 

NB100LVEP221

ORDERING INFORMATION

Device

NB100LVEP221FAG

Package

LQFP−52

(Pb−Free)

Shipping†

160 Units / Tray

NB100LVEP221FARG

LQFP−52

(Pb−Free)

1500 / Tape & Reel

NB100LVEP221MNG

QFN−52

(Pb−Free)

260 Units / Tray

NB100LVEP221MNR2G

QFN−52

(Pb−Free)

2000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D − ECL Clock Distribution Techniques

AN1406/D − Designing with PECL (ECL at +5.0 V)

AN1503/D − ECLinPSt I/O SPiCE Modeling Kit

AN1504/D − Metastability and the ECLinPS Family

AN1568/D − Interfacing Between LVDS and ECL

AN1672/D − The ECL Translator Guide

AND8001/D − Odd Number Counters Design

AND8002/D − Marking and Date Codes

AND8020/D − Termination of ECL Logic Devices

AND8066/D − Interfacing with ECLinPS

AND8090/D − AC Characteristics of ECL Devices

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