NB6L14M データシートの表示（PDF） - ON Semiconductor
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NB6L14M Datasheet PDF : 11 Pages
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NB6L14M
2.5 V/3.3 V 3.0 GHz
Differential 1:4 CML Fanout
Buffer
Multi−Level Inputs with Internal Termination
Description
The NB6L14M is a 3.0 GHz differential 1:4 CML fanout buffer.
The differential inputs incorporate internal 50 W termination resistors
that are accessed through the VT pin. This feature allows the
NB6L14M to accept various logic standards, such as CML, LVCMOS,
LVTTL, CML, or LVDS logic levels. The 16 mA differential CML
outputs provide matching internal 50 W terminations and produce
400 mV output swings when externally terminated with a 50 W
resistor to VCC. The VREFAC reference output can be used to rebias
capacitor−coupled differential or single−ended input signals. The 1:4
fanout design was optimized for low output skew applications.
The NB6L14M is a member of the ECLinPS MAX™ family of high
performance clock and data products.
Features
• Maximum Input Clock Frequency > 3.0 GHz, Typical
• < 20 ps Within Device Output Skew
• 350 ps Typical Propagation Delay
• 90 ps Typical Rise and Fall Times
• Differential CML Outputs, 400 mV Amplitude, Typical
• CML Mode Operating Range: VCC = 2.375 V to 3.63 V with
GND = 0 V
• Internal Input and Output Termination Resistors, 50 W
• VREFAC Reference Output Voltage
• −40°C to +85°C Ambient Operating Temperature
• Available in 3 mm x 3 mm 16 Pin QFN
• These are Pb−Free Devices
http://onsemi.com
QFN−16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB6L
14M
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
DQ
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 0
Publication Order Number:
NB6L14M/D
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