NBSG16VSBAR2 データシートの表示（PDF） - ON Semiconductor
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NBSG16VSBAR2 Datasheet PDF : 14 Pages
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NBSG16VS
+
VCTRL
0.1 mF
VCTRL VCC
VCC
RVAR
VTD
D
D
VTD
50 W
50 W 75
KW
36.5
KW
75
KW
VEE
VMM
Q
Q OUT
Q OUT
Q
50 W 50 W
VBB
VCC − 2 V
+3.3 V
VCTRL VCC
VTD
D
D
VTD
50 W
50 W 75
KW
36.5
KW
75
KW
VMM
Q
Q
VBB
Q OUT
Q OUT
140 W 140 W
VEE
Figure 3. Logic Diagram/
Voltage Source Implementation
Figure 4. Alternative Voltage Source Implementation
Table 2. INTERFACING OPTIONS
INTERFACING OPTIONS
CML
LVDS
AC−COUPLED
RSECL, PECL, NECL
LVTTL
LVCMOS
CONNECTIONS
Connect VTD and VTD to VCC
Connect VTD and VTD Together
Bias VTD and VTD Inputs within
Common Mode Range (VIHCMR)
Standard ECL Termination Techniques
An external voltage should be applied to the unused
complementary differential input. Nominal voltage is
1.5 V for LVTTL.
VMM should be connected to the unused
complementary differential input.
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