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NCP5008DMR2(2003) データシートの表示(PDF) - ON Semiconductor

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NCP5008DMR2
(Rev.:2003)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
NCP5008DMR2 Datasheet PDF : 20 Pages
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NCP5008, NCP5009
Operating Description
tCLKmin
90%
50%
10%
tf
tr
Figure 17. Digital Timing Definitions
Output
Vbat
ON
OFF
0.30* Vbat
0.70* Vbat Vbat
Input
Figure 18. Typical Schmitt Trigger Characteristic
Input Schmitt Triggers
All the Logic Input pins have built−in Schmitt trigger
circuits to prevent the NCP5008/NCP5009 against
uncontrolled operation. The typical dynamic characteristics
of the related pins are depicted in Figure 18.
The output signal is guaranteed to go High when the
input voltage is above 0.70*Vbat, and will go Low when the
input voltage is below 0.30*Vbat.
Local Mode
When the system operate in a Local Mode (Pin 6,
/LOCAL=Low), the output current depends solely upon
the current drawn pin 1. The clock signal is irrelevant and
the output current is derived by equation Iout = Iref * k, the
internal constant k being equal to 746.
ESD Protection
The NCP5008/NCP5009 includes silicon devices to
protect the pins against the ESD spikes voltages. To cope
with the different ESD voltages developed in the
applications, the built−in structures have been designed to
handle $2.0 kV in Human Body Model (HBM) and
$200 V in Machine Model (MM) and on each pin.
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