NCV4949ADWR2G データシートの表示（PDF） - ON Semiconductor
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NCV4949ADWR2G Datasheet PDF : 11 Pages
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NCV4949A
Reset Circuit
The block circuit diagram of the reset circuit is shown in
Figure 18.
The reset circuit supervises the output voltage. The reset
threshold of 4.5 V is defined by the internal reference
voltage and standby output divider.
The reset pulse delay time tRD, is defined by the charge
time of an external capacitor CT:
tRD
+
CT x
2.0
2.0
mA
V
The reaction time of the reset circuit originates from the
discharge time limitation of the reset capacitor CT and is
proportional to the value of CT. The reaction time of the reset
circuit increases the noise immunity.
1.23 V Vref
22 k
2.0 mA
Reset
Out
Reg
CT
+
- 2.0 V
Figure 18. Reset Circuit
Output voltage drops below the reset threshold only
marginally longer than the reaction time results in a shorter
reset delay time.
The nominal reset delay time will be generated for output
voltage drops longer than approximately 50 ms. The typical
reset output waveforms are shown in Figure 19.
Vout
Vin
40 V
5.0 V
Vout1
VRT + 0.1 V
VRT
3.0 V
t
tR
Reset
tRD
tRD
tRR
Switch On
Input Drop Dump
Output
Overload
Switch Off
Figure 19. Typical Reset Output Waveforms
Sense Comparator
The sense comparator compares an input signal with an
internal voltage reference of typical 1.23 V. The use of an
external voltage divider makes this comparator very flexible
in the application.
It can be used to supervise the input voltage either before
or after a protection diode and to provide additional
information to the microprocessor such as low voltage
warnings.
ORDERING INFORMATION
Device
Package
Shipping†
NCV4949ADR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCV4949APDR2G
SOIC−8 EP
(Pb−Free)
2500 / Tape & Reel
NCV4949ADWR2G
SOIC−20 WB
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
8
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