NCV7361A(2004) データシートの表示（PDF） - ON Semiconductor
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NCV7361A Datasheet PDF : 28 Pages
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NCV7361A
ELECTRICAL CHARACTERISTICS (7.0 V v VSUP v 18 V, −40°C v TA v 125°C unless otherwise noted)
Characteristic
Symbol
Condition
Min
Typ
RESET AC CHARACTERISTICS
Reset Time
tRes
Reset Rise Time (Note 9)
trr
BUS Debounce Time (Note 14)
tdeb_BUS
Wake−Up Time
tWake_BUS
GENERAL LIN BUS INTERFACE AC CHARACTERISTICS
5.25 v VSUP v 18 V
5.25 v VSUP v 18 V
−
−
70
100
3.0
7.5
1.5
2.8
25
60
Transmit Propagation Delay
TxD −> BUS (Notes 10 and 11)
tdr_TxD,
tdf_TxD
RL/CL at BUS
1.0 kW/1.0 nF
660 W/6.8 nF
500 W/10 nF
−
−
Symmetry of Propagation Delay
BUS −> RxD (Note 10)
tdsym_TxD
tdr_TxD − tdf_TxD
−2.0
−
Receiver Propagation Delay
BUS −> RxD (Notes 10 and 11)
tdr_RxD
tdf_RxD
CL(RxD) = 50 pF
−
−
Symmetry of Propagation Delay
TxD −> BUS (Note 10)
tdsym_RxD
tdr_RxD − tdf_RxD
−2.0
−
Slew Rate BUS Rising Edge (Note 9)
dV/dTrise
20% v VBUS v 80%
CL = 1.0 nF, RL = 1.0 kW
Slew Rate BUS Falling Edge (Note 9)
dV/dTfall
20% v VBUS v 80%
CL = 1.0 nF, RL = 1.0 kW
LIN BUS PARAMETER ACCORDING TO LIN SPEC. REV. 1.3
1.0
−2.5
1.7
−1.7
Slope Time, Transition from Recessive to
tsdom
VSUP = 8.0 V
−
−
Dominant (Notes 11 and 12)
RL = 500 W/CL = 10 nF
Slope Time, Transition from Dominant to
tsrec
Recessive (Notes 11 and 13)
VSUP = 8.0 V
−
−
RL = 500 W/CL = 10 nF
Slope Time Symmetry
tssym
VSUP = 8.0 V
−7.0
−
RL = 500 W/CL = 10 nF
Tssym = tsdom − tsrec
Slope Time, Transition from Recessive to
tsdom
VSUP = 18 V
−
−
Dominant (Notes 11 and 12)
RL = 500 W/CL = 10 nF
Slope Time, Transition from Dominant to
tsrec
Recessive (Notes 11 and 13)
VSUP = 18 V
−
−
RL = 500 W/CL = 10 nF
Slope Time Symmetry
tssym
VSUP = 18 V
−5.0
−
RL = 500 W/CL = 10 nF
Tssym = tsdom − tsrec
9. Not production tested, guaranteed by design and qualification.
10. See Figures 2 and 3, Timing Diagrams.
11. See Figures 5, 6, 7, 8, and 9 for test setup.
12. tsdom = (tVBUS40% − tVBUS95%) / 0.55.
13. tsdom = (tVBUS60% − tVBUS5%) / 0.55.
14. See Figure 18.
Max
Unit
140
ms
15
ms
4.0
ms
120
ms
4.0
ms
2.0
ms
6.0
ms
2.0
ms
2.5
V/ms
−1.0
V/ms
12
ms
12
ms
1.0
ms
18
ms
18
ms
5.0
ms
ELECTRICAL CHARACTERISTICS ( VSUP = 7.0 V to 18 V; BUS loads: 1.0 k / 1 nF; 660 / 6.8 nF; 500 / 10 nF, TxD Signal:
tBit = 50 ms, twH = TwL = tBit; trise = tfall < 100 ns, −40°C = TA = 125°C unless otherwise noted)
Characteristic
Symbol
Condition
Min
Typ
Max
LIN BUS PARAMETER ACCORDING TO LIN SPEC. REV. 2.0
Minimal Recessive Bit Time (Notes 15 and 16)
trec(min)
−
40
50
58
Maximum Recessive Bit Time (Notes 15 and 16)
trec(max)
−
40
50
58
Duty Cycle 1
D1
D1 = trec(min) / (2 * tBit)
0.396
−
−
Duty Cycle 2
D2
D2 = trec(max) / (2 * tBit)
−
−
0.581
15. See Timing Diagrams.
16. See Test Circuits for Dynamic and Static Characteristics.
Unit
ms
ms
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