DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

NCV7380 データシートの表示(PDF) - ON Semiconductor

部品番号
コンポーネント説明
メーカー
NCV7380
ON-Semiconductor
ON Semiconductor ON-Semiconductor
NCV7380 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NCV7380
ELECTRICAL CHARACTERISTICS (continued) (VS = 7.0 to 18 V, VCC = 4.5 to 5.5 V and TA = 40 to 125°C unless otherwise noted.)
Characteristic
Symbol
Condition
Min
Typ
Max
Unit
TXD
High Level Input Voltage
Low Level Input Voltage
TxD Pullup Resistor
RXD
Low Level Output Voltage
Leakage Current
AC CHARACTERISTICS
Vih
Vil
RIH_TXD
Rising Edge
Falling Edge
VTxD = 0 V
Vol_rxd
Vleak_rxd
IRxD = 2.0 mA
VRxD = 5.5 V, Recessive
0.7*VCC
V
0.3*VCC
V
10
15
25
kW
0.9
V
10
10
mA
Propagation Delay Transmitter
(Notes 10 and 12)
Propagation Delay Transmitter
Symmetry (Notes 8 and 12)
ttrans_pdf
ttrans_pdr
ttrans_sym
Bus Loads: 1.0 KW/1.0 nF,
660 W/6.8 nF, 500 W/10 nF
Calculate ttrans_pdf ttrans_pdr
2.0
5.0
ms
2.0
ms
Propagation Delay Receiver
(Notes 8, 9, 10, 12 and 15)
Propagation Delay Receiver
Symmetry (Notes 8 and 9)
trec_pdf
trec_pdr
trec_sym
CRxD = 20 pF
Calculate ttrans_pdf ttrans_pdr
2.0
6.0
ms
2.0
ms
Slew Rate Rising and Falling
Edge, High Battery
(Notes 8 and 13)
tSR_HB
Bus Loads: VS = 18 V, 1.0 KW/1.0 nF,
1.0
2.0
3.0
V/ms
660 W/6.8 nF, 500 W/10 nF
Slew Rate Rising and Falling
Edge, Low Battery
(Notes 8 and 13)
tSR_LB
Bus Loads: VS = 7.0 V, 1.0 KW/1.0 nF,
0.5
2.0
3.0
V/ms
660 W/6.8 nF, 500 W/10 nF
Slope Symmetry, High Battery
(Notes 8 and 13)
Bus Duty Cycle
(Notes 9 and 16)
Receiver Debounce Time
(Notes 11, 14 and 15)
tssym_HB
Bus Loads: VS = 18 V, 1.0 KW/1.0 nF,
5.0
660 W/6.8 nF, 500 W/10 nF, Calculate
tsdomtsrec
5.0
ms
D1
Calculate tBUS_rec(min)/100 ms
D2
Calculate tBUS_rec(max)/100 ms
0.396
ms/ms
0.581 ms/ms
trec_deb
BUS Rising and Falling Edge
1.5
4.0
ms
8. In accordance to LIN physical layer specification 1.3.
9. In accordance to LIN physical layer specification 2.0.
10. Propagation delays are not relevant for LIN protocol transmission, only symmetry.
11. No production test, guaranteed by design and qualification.
12. See Figure 2 Input/Output Timing.
13. See Figure 7 Slope Time Calculation.
14. See Figure 3 Receiver Debouncing.
15. This parameter is tested by applying a square wave to the bus. The minimum slew rate for the bus rising and falling edges is 50 V/ms.
16. See Figure 8 Duty Cycle Measurement and Calculation.
http://onsemi.com
5

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]