NJM3517E2 データシートの表示（PDF） - Japan Radio Corporation
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NJM3517E2 Datasheet PDF : 12 Pages
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NJM3517
s FUNCTIONAL DESCRIPTION
The circuit, NJM3517, is a high performance motor driver, intended to drive a stepper motor in a unipolar, bi-level
way. Bi-level means that during the first time after a phase shift, the voltage across the motor is increased to a
second voltage supply, VSS, in order to obtain a more-rapid rise of current, see figure 25.
The current starts to rise toward a value which is many times greater than the rated winding current. This com-
pensates for the loss in drive current and loss of torque due to the back emf of the motor.
After a short time, tOn, set by the monostable, the bi-level output is switched off and the winding current flows from
the VMM supply, which is chosen for rated winding current. How long this time must be to give any increase in
performance is determined by V voltage and motor data, the L/R time-constant.
SS
In a low-voltage system, where high motor performance is needed, it is also possible to double the motor voltage
by adding a few external components, see figure 4.
The time the circuit applies the higher voltage to the motor is controlled by a monostable flip-flop and determined
by the timing components RT and CT.
The circuit can also drive a motor in traditional unipolar way.
An inhibit input (INH) is used to switch off the current completely.
s LOGIC INPUTS
All inputs are LS-TTL compatible. If any of the logic inputs are left open, the circuit will accept it as a HIGH level.
NJM3517 contains all phase logic necessary to control the motor in a proper way.
STEP — Stepping pulse
One step is generated for each negative edge of the STEP signal. In half-step mode, two pulses will be required to
move one full step. Notice the set up time, ts, of DIR and HSM signals. These signals must be latched during the
negative edge of STEP, see timing diagram, figure 6.
VSS
VMM
+ 5V
VCC
CMOS, TTL-LS
Input / Output-Device
STEP
CW / CCW
HALF / FULL STEP
NORMAL /INHIBIT
(Optional Sensor)
GND
GND (VCC)
RC 12
R9 R8 RT CT
STEP 7
DIR 6
HSM 10
INH 11
OA 9
OB 8
Mono
F-F
Phase PA
Logic
PB
+
+
+
C3 C4 C5
VCC
VSS
16
15
PQR
D3
NJM3517
D2
D1
13 LA
14 LB
1 PB2
2 PB1
5 PA2
4 PA1
3 GND
R11
R10
MOTOR
D3-D6
D3-D6 are
UF 4001 or
BYV 27
trr < 100 ns
GND (VMM,VSS)
VMM
+ 5V
VCC
CMOS, TTL-LS
Input / Output-Device
STEP
CW / CCW
HALF / FULL STEP
NORMAL /INHIBIT
(Optional Sensor)
GND
GND (VCC)
RC 12
R9 R8 RT CT
STEP 7
DIR 6
HSM 10
INH 11
OA 9
OB 8
Mono
F-F
Phase PA
Logic
PB
+
+
R1
C3
C4
VCC
VSS
16
15
PQR
NJM3517
D1
13 LA
14 LB
1 PB2
2 PB1
5 PA2
4 PA1
R10
Q1
C1
Q3
R2
Equal to
Phase A R12
1/2 MOTOR
R13
R4
Q5
Q6
R5
3 GND
GND (VMM,VSS)
Figure 3.
Typical
application
Figure 4.
Voltage
doubling with
external
transistors
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