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NJU6010 データシートの表示(PDF) - Japan Radio Corporation

部品番号
コンポーネント説明
メーカー
NJU6010
JRC
Japan Radio Corporation  JRC
NJU6010 Datasheet PDF : 13 Pages
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NJU6010 Preliminary
! TERMINAL DESCRIPTION
No.
SYMBOL
1
TEST
2
CSb
3
SCL
4
DATA
5~8
9
10 ~ 15
16
S0 ~ S3
VSS
K0 ~ K5
VDD
FUNCTION
Oscillation Circuit Test Terminal
Data output is available by "L".
Serial Clock Input Terminal
Serial Data Output Terminal (This terminal outputs both the serial data
and REQ signals.)
CSb=”H” : Request signal output, CSb=”L” : Key data output
Key Scanning Output Terminals
GND Terminal
Key Scanning Input Terminals
Power Source Terminal
! FUNCTIONAL DESCRIPTION
(1) Description for Each Blocks
Serial I/F
The Serial I/F operates control of output signal.
Power ON Reset Circuit
The Power ON Reset Circuit initializes the key register automatically at Power ON.
Key-scan Circuit
When the key pressed, the Key-scan Circuit output the request signal from DATA terminal. The key data is
kept in the key register until CPU starts reading key data.
Key Register
The Key Register keeps the read key data.
Oscillation Circuit
The oscillation circuit is built-in.
(2) Key-scan Circuit
The Key-scan Circuit consists of a detector block of key pressing (S0~S3) and a fetching block of key
status (K0~K5). The Key-scan Circuit connects the 4x6 key-matrix and reads the data of 24 keys
maximum as shown in Fig1. Furthermore, it operates correctly against the multiple key inputs.
(Conditional)
NJU6010
K5 K4 K3 K2 K1 K0
S3 S2 S1 S0
ON
OFF
SW KEY
Fig. 1 Key-scan Matrix
-2-
Ver.2009-08-20

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