NM27C020 データシートの表示（PDF） - Fairchild Semiconductor
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NM27C020 Datasheet PDF : 14 Pages
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Functional Description (Continued)
Program Inhibit
Programming multiple EPROM’s in parallel with different data is
also easily accomplished. Except for CE all like inputs (including
OE) of the parallel EPROM may be common. A TTL low level
program pulse applied to an EPROM’s CE with VPP at 12.75V will
program that EPROM. A TTL high level CE input inhibits the other
EPROM’s from being programmed.
Program Verify
A verify should be performed on the programmed bits to determine
whether they were correctly programmed. The verify may be
performed with VPP at 12.75V. VPP must be at VCC, except during
programming and program verify.
MANUFACTURER’S IDENTIFICATION CODE
The part has a manufacturer’s indentification code to aid in
programming. When the device is inserted in an EPROM pro-
grammer socket, the programmer reads the code and then
automatically calls up the specific programming algorithm for the
part. This automatic programming control is only possible with
programmers which have the capability of reading the code.
The Manufacturer’s Identification code, shown in Table 2, specifi-
cally identifies the manufacturer and device type. The code for the
NM27C020 is “8F8E,” where “8F” designates that it is made by
Fairchild Semiconductor, and “8E” designates a 2 Megabit byte-
wide part.
The code is accessed by applying 12V ±0.5V to address pin A9.
Addresses and control pins are held at VIL, except A0. Address pin
A0 is held at VIL for the manufacturer’s code, and held at VIH for the
device code. The code is read on the eight data pins, O0 –07 .
Proper code access is only guaranteed at 25°C ± 5°C.
ERASURE CHARACTERISTICS
The erasure characteristics of the device are such that erasure
begins to occur when exposed to light with wavelengths shorter
than approximately 4000 Angstroms (Å). It should be noted that
sunlight and certain types of fluorescent lamps have wavelengths
in the 3000Å – 4000Å range. After programming, opaque labels
should be placed over the EPROM window to prevent uninten-
tional erasure. Covering the window will also prevent temporary
functional failure due to the generation of photo currents.
The recommended erasure procedure for the EPROM is expo-
sure to short wave ultraviolet light which has a wavelength of
2537Å. The integrated dose (i.e., UV intensity X exposure time) for
erasure should be a minimum of 15W-sec/cm2. The device should
be placed within 1 inch of the lamp tubes during erasure. The
device should be placed within 1 inch of the lamp tubes during
erasure.
An erasure system should be calibrated periodically. The distance
from lamp to device should be maintained at one inch. The erasure
time increases as the square of the distance from the lamp. (if
distance is doubled the erasure time increases by factor of 4).
Lamps lose intensity as they age. When a lamp is changed, the
distance has changed, or the lamp has aged, the system should
be checked to make certain full erasure is occurring. Incomplete
erasure will cause symptoms that can be misleading. Program-
mers, components and even system designs have been errone-
ously suspected when incomplete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require careful
decoupling of the devices. The supply current, ICC, has three
segments that are of interest to the system designer: the standby
current level, the active current level, and the transient current
peaks that are produced by voltage transitions on input pins. The
magnitude of these transient current peaks is dependent on the
output capacitance loading of the device. The associated VCC
transient voltage peaks can be suppressed by properly selected
decoupling capacitors. It is recommended that at least a 0.1 µF
ceramic capacitor be used on every device between VCC and
GND. This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 µF bulk electrolytic capacitor
should be used between VCC and GND for each eight devices. The
bulk capacitor should be located near where the power supply is
connected to the array. The purpose of the bulk capacitor is to
overcome the voltage drop caused by the inductive effects of the
PC board traces.
TABLE 2. Manufacturer’s Identification Code
Pins
A0 A9 O7 O6 O5 O4 O3 O2 O1 O0 Hex
(12) (26) (21) (19) (18) (17) (16) (15) (14) (13) Data
Manufacturer Code VIL
12V
1
0
0
0
1
1
1
1
8F
Device Code
VIH
12V
0
0
0
0
0
1
1
1
07
11
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