UPD3788D データシートの表示（PDF） - NEC => Renesas Technology
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UPD3788D Datasheet PDF : 24 Pages
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µPD3788
INPUT PIN CAPACITANCE (TA = +25 °C, VOD = 12 V)
Parameter
Symbol Pin name Pin No. MIN. TYP. MAX. Unit
Shift register clock pin capacitance 1
Cφ1
φ1
13
350
500
pF
23
350
500
pF
φ10
9
350
500
pF
Shift register clock pin capacitance 2
Cφ2
φ2
14
350
500
pF
24
350
500
pF
φ20
28
350
500
pF
Last stage shift register clock pin capacitance
CφL
φ1L
29
10
pF
Reset gate clock pin capacitance
CφRB
φRB
8
10
pF
Reset feed-through level clamp clock pin capacitance
CφCLB
φCLB
30
10
pF
Transfer gate clock pin capacitance
CφTG
φTG1
22
100
pF
φTG2
21
100
pF
φTG3
15
100
pF
Remark Pins 13, 23 (φ1) and pin 9 (φ10) are connected each other inside of the device.
Pins 14, 24 (φ2) and pin 28 (φ20) are connected each other inside of the device.
Data Sheet S14664EJ1V0DS00
7
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