UPD753104GK データシートの表示（PDF） - NEC => Renesas Technology

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UPD753104GK

4-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

µPD753104, 753106, 753108

Functional Outline

Parameter

Function

Instruction execution time

• 0.95, 1.91, 3.81, 15.3 µs (@ 4.19 MHz with main system clock)

• 0.67, 1.33, 2.67, 10.7 µs (@ 6.0 MHz with main system clock)

• 122 µs (@ 32.768 kHz with subsystem clock)

On-chip memory

ROM 4096 x 8 bits (µPD753104)

6144 x 8 bits (µPD753106)

8192 x 8 bits (µPD753108)

RAM 512 x 4 bits

General-purpose register

• 4-bit operation: 8 x 4 banks

• 8-bit operation: 4 x 4 banks

Input/

output

port

CMOS input

CMOS input/output

8 On-chip pull-up resistors which can be specified by software: 7

20 On-chip pull-up resistors which can be specified by software: 12

Also used for segment pins: 8

N-ch open-drain

input/output pins

4 On-chip pull-up resistors which can be specified by mask option, 13-V withstand

voltage

Total

32

LCD controller/driver

• Segment selection:

16/20/24 segments (can be changed to CMOS input/

output port in 4 time-unit; max. 8)

• Display mode selection: Static, 1/2 duty (1/2 bias), 1/3 duty (1/2 bias),

1/3 duty (1/3 bias), 1/4 duty (1/3 bias)

• On-chip split resistor for LCD drive can be specified by mask option

Timer

5 channels

• 8-bit timer/event counter: 3 channels (16-bit timer/event counter, carrier generator,

timer with gate)

• Basic interval timer/watchdog timer: 1 channel

• Watch timer: 1 channel

Serial interface

• 3-wire serial I/O mode ... MSB or LSB can be selected for transferring first bit

• 2-wire serial I/O mode

• SBI mode

Bit sequential buffer (BSB)

16 bits

Clock output (PCL)

• Φ, 524, 262, 65.5 kHz (@ 4.19 MHz with main system clock)

• Φ, 750, 375, 93.8 kHz (@ 6.0 MHz with main system clock)

Buzzer output (BUZ)

• 2, 4, 32 kHz

(@ 4.19 MHz with main system clock or

@ 32.768 kHz with subsystem clock)

• 2.93, 5.86, 46.9 kHz (@ 6.0 MHz with main system clock)

Vectored interrupt

External: 3, Internal: 5

Test input

External: 1, Internal: 1

System clock oscillator

• Ceramic or crystal oscillator for main system clock oscillation

• Crystal oscillator for subsystem clock oscillation

Standby function

STOP/HALT mode

Supply voltage

VDD = 1.8 to 5.5 V

Package

• 64-pin plastic QFP (14 x 14 mm, 0.8-mm pitch)

• 64-pin plastic QFP (12 x 12 mm, 0.65-mm pitch)

3

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