P89LPC9351(2008) データシートの表示（PDF） - NXP Semiconductors.

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P89LPC9351
(Rev.:2008)

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

NXP Semiconductors. 

NXP Semiconductors

4. Block diagram

P89LPC9351

8-bit microcontroller with 8-bit ADC

P89LPC9351

ACCELERATED 2-CLOCK 80C51 CPU

P3[1:0]

P2[7:0]

P1[7:0]

P0[7:0]

CRYSTAL

OR

RESONATOR

XTAL1

XTAL2

8 kB

CODE FLASH

256-BYTE

DATA RAM

512-BYTE

AUXILIARY RAM

internal bus

512-BYTE

DATA EEPROM

PORT 3

CONFIGURABLE I/Os

PORT 2

CONFIGURABLE I/Os

PORT 1

CONFIGURABLE I/Os

PORT 0

CONFIGURABLE I/Os

KEYPAD

INTERRUPT

WATCHDOG TIMER

AND OSCILLATOR

PROGRAMMABLE

OSCILLATOR DIVIDER

CPU

clock

CONFIGURABLE

OSCILLATOR

ON-CHIP RC

OSCILLATOR

WITH CLOCK

DOUBLER

Fig 1. Block diagram

UART

I2C-BUS

SPI

REAL-TIME CLOCK/

SYSTEM TIMER

TIMER 0

TIMER 1

ANALOG

COMPARATORS

CCU (CAPTURE/

COMPARE UNIT)

ADC1/DAC1

(PGA1)

ADC0/TEMP

SENSOR/

DAC0 (PGA0)

POWER MONITOR

(POWER-ON RESET,

BROWNOUT RESET)

TXD

RXD

SCL

SDA

SPICLK

MOSI

MISO

SS

T0

T1

CMP2

CIN2B

CIN2A

CMP1

CIN1A

CIN1B

OCA

OCB

OCC

OCD

ICA

ICB

AD10

AD11

AD12

AD13

DAC1

AD00

AD01

AD02

AD03

DAC0

002aad555

P89LPC9351_1

Preliminary data sheet

Rev. 01 — 19 November 2008

© NXP B.V. 2008. All rights reserved.

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