P89LPC9351(2008) データシートの表示（PDF） - NXP Semiconductors.

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P89LPC9351
(Rev.:2008)

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

NXP Semiconductors. 

NXP Semiconductors

P89LPC9351

8-bit microcontroller with 8-bit ADC

6.2 Pin description

Table 3. Pin description

Symbol

Pin

PLCC28,

TSSOP28

P0.0 to P0.7

P0.0/CMP2/

3

KBI0/AD01

P0.1/CIN2B/

26

KBI1/AD10

P0.2/CIN2A/

25

KBI2/AD11

P0.3/CIN1B/

24

KBI3/AD12

P0.4/CIN1A/

23

KBI4/DAC1/AD13

P0.5/CMPREF/

22

KBI5

Type Description

I/O Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. During reset

Port 0 latches are configured in the input only mode with the internal pull-up

disabled. The operation of Port 0 pins as inputs and outputs depends upon the

port configuration selected. Each port pin is configured independently. Refer to

Section 7.16.1 “Port configurations” and Table 10 “Static characteristics” for

details.

The Keypad Interrupt feature operates with Port 0 pins.

All pins have Schmitt trigger inputs.

Port 0 also provides various special functions as described below:

I/O P0.0 — Port 0 bit 0.

O CMP2 — Comparator 2 output

I

KBI0 — Keyboard input 0.

I

AD01 — ADC0 channel 1 analog input.

I/O P0.1 — Port 0 bit 1.

I

CIN2B — Comparator 2 positive input B.

I

KBI1 — Keyboard input 1.

I

AD10 — ADC1 channel 0 analog input.

I/O P0.2 — Port 0 bit 2.

I

CIN2A — Comparator 2 positive input A.

I

KBI2 — Keyboard input 2.

I

AD11 — ADC1 channel 1 analog input.

I/O P0.3 — Port 0 bit 3. High current source.

I

CIN1B — Comparator 1 positive input B.

I

KBI3 — Keyboard input 3.

I

AD12 — ADC1 channel 2 analog input.

I/O P0.4 — Port 0 bit 4. High current source.

I

CIN1A — Comparator 1 positive input A.

I

KBI4 — Keyboard input 4.

O DAC1 — Digital-to-analog converter output 1.

I

AD13 — ADC1 channel 3 analog input.

I/O P0.5 — Port 0 bit 5. High current source.

I

CMPREF — Comparator reference (negative) input.

I

KBI5 — Keyboard input 5.

P89LPC9351_1

Preliminary data sheet

Rev. 01 — 19 November 2008

© NXP B.V. 2008. All rights reserved.

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