CXA3026 データシートの表示（PDF） - Sony Semiconductor

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CXA3026

8-bit 120MSPS Flash A/D Converter

Sony Semiconductor 

CXA3026Q

Pin

No.

Symbol

I/O

Standard

voltage level

15 CLK/T

I

Equivalent circuit

DVCC1

r/2

TTL

46 RESETN/T I

15 46

DGND1

DVEE3

DVCC1

1.5V

r

44 INV

I

TTL

44

DGND1

DVEE3

DVCC1

Description

Clock input.

Reset input.

When left open, this input goes to

high level. When the input is set to

low level, the built-in CLK frequency

divider circuit can be reset.

Data output polarity inversion input.

When left open, this input goes to

high level.

(See Table 1. I/O Correspondence

Table.)

45 SELECT

Vcc

or

45

GND

Data output mode selection.

(See Table 2. Operating Mode

Table.)

11 VRT

9 VRM3

7 VRM2

4 VRM1

2 VRB

DGND1

DVEE3

I

4.0V

(typ.)

VRB +

3 (VRT – VRB)

4

VRB +

2

4

(VRT – VRB)

VRB +

1

4

(VRT – VRB)

I

2.0V

(typ.)

r1

11

r/2

r

Comparator 1

r

9

r

Comparator 63

Comparator 64

Comparator 127

7

r

Comparator 128

4

r

Comparator 191

Comparator 192

r

Comparator 255

r/2

2

r2

Top reference voltage.

By-pass to AGND with a 1µF tantal

capacitor and a 0.1µF chip capacitor.

Reference voltage mid point.

By-pass to AGND with a 0.1µF chip

capacitor.

Reference voltage mid point.

By-pass to AGND with a 0.1µF chip

capacitor.

Reference voltage mid point.

By-pass to AGND with a 0.1µF chip

capacitor.

Bottom reference voltage.

By-pass to AGND with a 1µF tantal

capacitor and a 0.1µF chip capacitor.

–5–

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