A6A259KA データシートの表示（PDF） - Allegro MicroSystems
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A6A259KA Datasheet PDF : 10 Pages
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6A259
8-BIT ADDRESSABLE
DMOS POWER DRIVER
TERMINAL DESCRIPTIONS
A6A259KA A6A259KLB
(DIP)
(SOIC)
Terminal No. Terminal No.
Terminal Name Function
1
1
OUT2
Current-sinking, open-drain DMOS output, address 010.
2
2
OUT3
Current-sinking, open-drain DMOS output, address 011.
3
3
S1
Binary-coded output-select input.
4
4
LOGIC GROUND Reference terminal for input voltage measurements.
5
5, 6
POWER GROUND Reference terminal for output voltage measurements
(OUT0-3).
6
7, 8
POWER GROUND Reference terminal for output voltage measurements
(OUT4-7).
7
9
S2
Binary-coded output-select input, most-significant bit.
8
10
ENABLE
Mode control input; see Function Table.
9
11
10
12
11
13
12
14
13
15
OUT4
OUT5
OUT6
OUT7
DATA
Current-sinking, open-drain DMOS output, address 100.
Current-sinking, open-drain DMOS output, address 101.
Current-sinking, open-drain DMOS output, address 110.
Current-sinking, open-drain DMOS output, address 111.
CMOS data input to the addressed output latch. When
enabled, the addressed output inverts the data input
(DATA = HIGH, OUTPUT = LOW).
14
16
CLEAR
Mode control input; see Function Table.
15
17, 18
POWER GROUND Reference terminal for output voltage measurements
(OUT4-7).
16
19, 20
POWER GROUND Reference terminal for output voltage measurements
(OUT0-3).
17
21
LOGIC SUPPLY (VDD) The logic supply voltage (typically 5 V).
18
22
S0
Binary-coded output-select input, least-significant bit.
19
23
OUT0
Current-sinking, open-drain DMOS output, address 000.
20
24
OUT1
Current-sinking, open-drain DMOS output, address 001.
NOTE —Power grounds must be connected together externally.
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