Figure 3 shows the undershoot and overshoot voltage of the memory interface of the
PC8245.
Figure 3. Overshoot/Undershoot Voltage
4V
GVdd_OVvdd + 5%
VIH
GVdd_OVdd
GND/GNDRING
VIL
GND/GNDRING - 0.3V
GND/GNDRING Q - 1.0V
Not to exceed 10%
of tSDRAM_CLK
Thermal Characteristics Table 2 provides the package thermal characteristics for the PC8245. For further infor-
mation, see Section “Thermal Management Information” on page 15.
Table 2. Thermal Characterization Data
Symbol
Characteristic
Value
Unit
RθJA
Junction-to-ambient natural convection (Single-layer board—1s)(1)(2)
16.1
°C/W
RθJMA
Junction-to-ambient natural convection (Four-layer board—2s2p)(1)(3)
12.0
°C/W
RθJMA
Junction-to-ambient (at 200 ft/min) (Single-layer board—1s)(1)(3)
11.6
°C/W
RθJMA
Junction-to-ambient (at 200 ft/min)(Four layer board—2s2p)(1)(3)
9.0
°C/W
RθJB
Junction-to-Board(4)
4.8
°C/W
RθJC
Junction-to-Case(5)
1.8
°C/W
ΨJT
Junction-to-package top (natural convection)(6)
1.0
°C/W
Notes: 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal
resistance.
2. Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal.
3. Per JEDEC JESD51-6 with the board horizontal.
4. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1) with the cold plate used for case temperature.
6. Thermal characterization parameter indicating the temperature difference between package top and the junction tempera-
ture per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-
JT.
14 PC8245
2171D–HIREL–06/04