PCA9508 データシートの表示（PDF） - NXP Semiconductors.

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PCA9508

Hot swappable level translating I2C-bus repeater

NXP Semiconductors. 

NXP Semiconductors

5. Pinning information

5.1 Pinning

PCA9508

Hot swappable level translating I2C-bus repeater

VCC(A) 1

SCLA 2

SDAA 3

GND 4

8 VCC(B)

7 SCLB

PCA9508D

6 SDAB

5 EN

002aac652

Fig 2. Pin configuration for SO8

VCC(A) 1

SCLA 2

SDAA 3

GND 4

PCA9508DP

8 VCC(B)

7 SCLB

6 SDAB

5 EN

002aac653

Fig 3. Pin configuration for TSSOP8

5.2 Pin description

Table 3.

Symbol

VCC(A)

SCLA

SDAA

GND

EN

SDAB

SCLB

VCC(B)

Pin description

Pin

Description

1

A side supply voltage (0.9 V to 5.5 V)

2

open-drain input/output serial clock A side bus

3

open-drain input/output serial data A side bus

4

supply ground (0 V)

5

active HIGH repeater enable input with an internal pull-up (100 kΩ)

6

open-drain input/output serial data B side bus

7

open-drain input/output serial clock B side bus

8

B side supply voltage (2.7 V to 5.5 V)

6. Functional description

Refer to Figure 1 “Functional diagram of PCA9508”.

The PCA9508 enables I2C-bus or SMBus translation down to VCC(A) as low as 0.9 V

without degradation of system performance. The PCA9508 contains two bidirectional

open-drain buffers specifically designed to provide superior hot-swap and/or support

up-translation/down-translation between the low voltage (as low as 0.9 V) and a 3.3 V or

5 V I2C-bus or SMBus. All inputs and I/Os are overvoltage tolerant to 5.5 V even when the

device is unpowered (VCC(B) and/or VCC(A) = 0 V). The PCA9508 includes a power-up

circuit that keeps the output drivers turned off until VCC(B) is above 2.5 V and the VCC(A) is

above 0.8 V. VCC(B) and VCC(A) can be applied in any sequence at power-up. VCC(A) is only

used to provide the 0.5VCC(A) reference to the A side input comparators and for the power

good detect circuit. The PCA9508 logic and all I/Os are powered by the VCC(B) pin.

An undervoltage/initialization circuit holds the PCA9508 in a disconnected state which

presents high-impedance to all SDA and SCL pins during power-up. A LOW on the enable

pin (EN) also forces the parts into the disconnected state. As the power supply is brought

up and EN is HIGH or the part is powered and EN is taken from LOW to HIGH it enters an

initialization state where the internal references are stabilized. At the end of the

initialization state the ‘STOP bit and bus idle’ detect circuit is enabled. With the EN pin

PCA9508_1

Product data sheet

Rev. 01 — 28 April 2008

© NXP B.V. 2008. All rights reserved.

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