PCA9541 データシートの表示（PDF） - Philips Electronics

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PCA9541

2-to-1 I2C master selector with interrupt logic and reset

Philips Electronics 

Philips Semiconductors

2-to-1 I2C master selector with interrupt logic and reset

Product data sheet

PCA9541

INTERRUPT STATUS REGISTERS DESCRIPTION

The PCA9541 provides 4 different types of interrupt:

1. To indicate to the former I2C-bus master that it is not in control of

the bus anymore.

2. To indicate to the new I2C-bus master that:

– The bus recovery/initialization has been performed and that

the downstream channel connection has been done (built-in

bus recovery/initialization active).

– A “bus not well initialized” condition has been detected by the

PCA9541 when the switch has been done (built-in bus

recovery/initialization not active). This information can be

used by the new master to initiate its own bus

recovery/initialization sequence.

3. Indicate to both I2C upstream masters that a downstream

interrupt has been generated through the INT_IN pin.

4. Functionality wiring test.

Bus control lost interrupt

When an upstream master takes control of the I2C-bus while the

other channel was using the downstream channel, an interrupt is

generated to the master losing control of the bus (INT line goes

LOW to let the master know that it lost the control of the bus)

immediately after disconnection from the downstream channel.

By setting the BUSLOSTMSK bit to 1, the interrupt is masked and

the upstream master that lost the I2C-bus control does not receive

an interrupt (INT line does not go LOW).

Recovery/initialization interrupt

Before switching to a new upstream channel, an automatic bus

recovery/initialization can be performed by the PCA9541. This

function is requested by setting the BUSINIT bit to 1. When the

downstream bus has been initialized, an interrupt to the new master

is generated (INT line goes LOW).

By setting the BUSINITMSK bit to 1, the interrupt is masked and the

new master does not receive an interrupt (INT line does not go

LOW).

When the automatic bus recovery/initialization is not requested, if

the built-in bus sensor function (sensing permanently the

downstream I2C traffic) detects a non-idle condition (previous bus

channel connected to the downstream slave channel, was between

a START and STOP condition), then an interrupt to the new master

is sent (INT line goes LOW). This interrupt tells the new master that

an external bus recovery/initialization must be performed. By setting

the BUSOKMSK bit to 1, the interrupt is masked and the new

master does not receive an interrupt (INT line does not go LOW).

NOTE: In this particular situation, after the switch to the new master

is performed, a read of the Interrupt Status Register is not

possible if the switch happened in the middle of a read

sequence because the new master does not have control of the

SDA line

Downstream interrupt

An interrupt can also be generated by a downstream device by

asserting the INT_IN pin LOW. When INT_IN is asserted LOW and if

both INTINMSK bits are not set to 1 by either master, INT0 and INT1

both go LOW.

By setting the INTINMSK bit to 1 by a master and/or the INTINMSK

bit to 1 by the other master, the interrupt(s) is (are) masked and the

corresponding masked channel(s) does (do) not receive an interrupt

(INT0 and/or INT1 line does (do) not go LOW).

Functional test interrupt

A master can send an interrupt to itself to test its own INT wire or

send an interrupt to the other master to test its INT line. This is done

by:

– Setting the TESTON bit to 1 to test its own INT line.

– Setting the NTESTON bit to 1 to test the other master INT

line.

Setting the TESTON and/or NTESTON bits to 0 by a master will

clear the interrupt(s).

NOTE: Interrupt outputs have an open-drain structure. Interrupt

input does not have any internal pull-up resistor and must not be left

floating (e.g., pulled high to VCC through resistor) in order to avoid

any undesired interrupt conditions.

2004 Oct 01

11

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