PCA9541PW データシートの表示（PDF） - NXP Semiconductors.
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PCA9541PW Datasheet PDF : 41 Pages
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NXP Semiconductors
PCA9541
2-to-1 I2C-bus master selector with interrupt logic and reset
7.2 Pin description
Table 3. Pin description
Symbol
Pin
Description
SO16,
HVQFN16
TSSOP16
INT0
1
15
active LOW interrupt output 0 (external pull-up required)
SDA_MST0 2
16
serial data master 0 (external pull-up required)
SCL_MST0 3
1
serial clock master 0 (external pull-up required)
RESET
4
2
active LOW reset input (external pull-up required)
SCL_MST1 5
3
serial clock master 1 (external pull-up required)
SDA_MST1 6
4
serial data master 1 (external pull-up required)
INT1
7
5
active LOW interrupt output 1 (external pull-up required)
VSS
8
A0
9
A1
10
A2
11
A3
12
SCL_SLAVE 13
6[1]
supply ground
7
address input 0 (externally held to VSS or VDD)
8
address input 1 (externally held to VSS or VDD)
9
address input 2 (externally held to VSS or VDD)
10
address input 3 (externally held to VSS or VDD)
11
serial clock slave (external pull-up required)
SDA_SLAVE 14
12
serial data slave (external pull-up required)
INT_IN
15
13
active LOW interrupt input (external pull-up required)
VDD
16
14
supply voltage
[1] HVQFN16 package die supply ground is connected to both the VSS pin and the exposed center pad. The
VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the printed-circuit board in the thermal pad region.
PCA9541_7
Product data sheet
Rev. 07 — 2 July 2009
© NXP B.V. 2009. All rights reserved.
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