PCK953BD データシートの表示（PDF） - NXP Semiconductors.
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PCK953BD Datasheet PDF : 15 Pages
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NXP Semiconductors
PCK953
20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver
3. Ordering information
Table 1. Ordering information
Type number
Package
Name
Description
PCK953BD
LQFP32 plastic low profile quad flat package; 32 leads; body 7 × 7 × 1.4 mm
PCK953BD/G
Also refer to Table 8 “Packing information”.
4. Functional diagram
Version
SOT358-1
PECL_CLK
PECL_CLK
FB_CLK
PHASE
DETECTOR
LPF
VCO
200 MHz
to 500 MHz
VCO_SEL
BYPASS
MR/OE
PLL_EN
Fig 1. Functional diagram
5. Pinning information
5.1 Pinning
÷4
÷2
QFB
7 Q0 to Q6
Q7
002aae138
VCCA 1
FB_CLK 2
n.c. 3
n.c. 4
n.c. 5
n.c. 6
GNDI 7
PECL_CLK 8
PCK953BD
PCK953BD/G
24 Q1
23 VCCO
22 Q2
21 GNDO
20 Q3
19 VCCO
18 Q4
17 GNDO
002aae137
PCK953_5
Product data sheet
Fig 2. Pin configuration for LQFP32
Rev. 05 — 9 October 2008
© NXP B.V. 2008. All rights reserved.
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