ST62E80BG1 データシートの表示（PDF） - STMicroelectronics

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ST62E80BG1

8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER

STMicroelectronics 

ST62T80B/E80B

1 GENERAL DESCRIPTION

1.1 INTRODUCTION

The ST62T80B and ST62E80B devices are low

cost members of the ST62xx 8-bit HCMOS family

of microcontrollers, which is targeted at low to me-

dium complexity applications. All ST62xx devices

are based on a building block approach: a com-

Figure 1. Block Diagram

mon core is surrounded by a number of on-chip

peripherals.

The ST62E80B is the erasable EPROM version of

the ST62T80B device, which may be used to em-

ulate the ST62T80B device, as well as the respec-

tive ST6280B ROM devices.

TEST/VPP

NMI

TEST

8-BIT

A/D CONVERTER

INTERRUPT

PROGRAM

Memory

7948 bytes

DATA ROM

USER

SELECTABLE

DATA RAM

192 Bytes

DATA EEPROM

128 Bytes

PC

STACK LEVEL 1

STACK LEVEL 2

STACK LEVEL 3

STACK LEVEL 4

STACK LEVEL 5

STACK LEVEL 6

8 BIT CORE

POWER OSCILLATOR RESET

SUPPLY

PORT A

PORT B

ARTIMER

UART

PORT C

LCD DRIVER

OSC 32kHz

TIMER

DIGITAL

WATCHDOG

SPI (SERIAL

PERIPHERAL

INTERFACE)

PA2..PA3 / 20mA Sink

PA4 / TIMER / 20mA Sink

PA5 / Scl / 20mA Sink

PA6 / Sin / 20mA Sink

PA7 / Sout / 20mA Sink

PB0 / TXD1 / Ain

PB1 / RXD1 / Ain

PB2..PB5 / Ain

PB6 / ARTIMin / Ain

PB7 / ARTIMout / Ain

PC0..PC3 / 20mA Sink

PC4..PC7 / Ain

COM1..COM8

S9..S56

COM9..COM16 / S1..S8

VLCD

VLCD1/5

VLCD2/5

VLCD3/5

VLCD4/5

OSC32in

OSC32out

VDD VSS OSCin OSCout RESET

(VPP on EPROM/OTP versions only)

VA0479

5/80

5

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