PESD5V0S2BT データシートの表示（PDF） - NXP Semiconductors.
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PESD5V0S2BT Datasheet PDF : 12 Pages
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NXP Semiconductors
PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
7. Application information
The PESD5V0S2BT is designed for the bidirectional protection of two lines from the
damage caused by ElectroStatic Discharge (ESD) and surge pulses.
The PESD5V0S2BT may be used on lines where the signal polarities are both, positive
and negative with respect to ground. The PESD5V0S2BT provides a surge capability of
130 W per line for an 8/20 µs waveform.
line 1 to be protected
line 2 to be protected
PESD5V0S2BT
GND
001aaa636
Fig 8. Typical application for bidirectional protection of two lines
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESD5V0S2BT as close to the input terminal or connector as possible.
2. The path length between the PESD5V0S2BT and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
PESD5V0S2BT_3
Product data sheet
Rev. 03 — 9 February 2009
© NXP B.V. 2009. All rights reserved.
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