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A6277SLW(2000) データシートの表示(PDF) - Allegro MicroSystems

部品番号
コンポーネント説明
メーカー
A6277SLW
(Rev.:2000)
Allegro
Allegro MicroSystems Allegro
A6277SLW Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
6275
8-BIT SERIAL-INPUT,
CONSTANT-CURRENT
LATCHED LED DRIVER
TERMINAL DESCRIPTION
Terminal No.
1
2
3
4
5-12
13
Terminal Name
GND
SERIAL DATA IN
CLOCK
LATCH ENABLE
OUT0-7
OUTPUT ENABLE
14
SERIAL DATA OUT
15
REXT
16
SUPPLY
Function
Reference terminal for control logic.
Serial-data input to the shift-register.
Clock input terminal for data shift on rising edge.
Data strobe input terminal; serial data is latched with high-level input.
The eight current-sinking output terminals.
When (active) low, the output drivers are enabled; when high, all output
drivers are turned OFF (blanked).
CMOS serial-data output to the following shift-register.
An external resistor at this terminal establishes the output current for all sink
drivers.
(VDD) The logic supply voltage (typically 5 V).
www.allegromicro.com
The products described here are manufactured under one or more
U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to
time, such departures from the detail specifications as may be
required to permit improvements in the performance, reliability, or
manufacturability of its products. Before placing an order, the user is
cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components
in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and
reliable. However, Allegro MicroSystems, Inc. assumes no responsi-
bility for its use; nor for any infringement of patents or other rights of
third parties which may result from its use.
9

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