PIC10F220 データシートの表示（PDF） - Microchip Technology

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PIC10F220

High-Performance Microcontrollers with 8-bit A/D

Microchip Technology 

PIC10F220/222

TABLE 4-1: SPECIAL FUNCTION REGISTER (SFR) SUMMARY

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2

Bit 1

Bit 0

Value on

Power-On

Reset(2)

Page #

00h

INDF

Uses contents of FSR to address data memory (not a physical register)

xxxx xxxx

20

01h

TMR0

8-Bit Real-Time Clock/Counter

02h

PCL(1)

Low Order 8 Bits of PC

xxxx xxxx

25

1111 1111

19

03h

STATUS GPWUF —

—

TO

PD

Z

DC

C

0--1 1xxx(3)

15

04h

FSR

Indirect Data Memory Address Pointer

111x xxxx

20

05h

OSCCAL CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 FOSC4 1111 1110

18

06h

GPIO

—

—

—

—

GP3 GP2

GP1

GP0 ---- xxxx

21

07h

ADCON0 ANS1 ANS0 —

— CHS1 CHS0 GO/DONE ADON 11-- 1100

30

08h

ADRES Result of Analog-to-Digital Conversion

xxxx xxxx

31

N/A

TRISGPIO —

—

—

— I/O Control Register

---- 1111

23

N/A

OPTION GPWU GPPU T0CS T0SE PSA PS2

PS1

PS0 1111 1111

17

Legend:

Note 1:

– = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.

The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an

explanation of how to access these bits.

2: Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change

Reset.

3: See Table 8-1 for other Reset specific values.

4.4 STATUS Register

This register contains the arithmetic status of the ALU,

the Reset status and the page preselect bit.

The STATUS register can be the destination for any

instruction, as with any other register. If the STATUS

register is the destination for an instruction that affects

the Z, DC or C bits, then the write to these three bits is

disabled. These bits are set or cleared according to the

device logic. Furthermore, the TO and PD bits are not

writable. Therefore, the result of an instruction with the

STATUS register as destination may be different than

intended.

For example, CLRF STATUS will clear the upper three

bits and set the Z bit. This leaves the STATUS register

as 000u u1uu (where u = unchanged).

Therefore, it is recommended that only BCF, BSF and

MOVWF instructions be used to alter the STATUS regis-

ter. These instructions do not affect the Z, DC or C bits

from the STATUS register. For other instructions, which

do affect Status bits, see Instruction Set Summary.

© 2007 Microchip Technology Inc.

DS41270E-page 15

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