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ISPLSI2064E-200LT100 データシートの表示(PDF) - Lattice Semiconductor

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ISPLSI2064E-200LT100
Lattice
Lattice Semiconductor Lattice
ISPLSI2064E-200LT100 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Specifications ispLSI 2064E
Pin Description
NAME
I/O 0 - I/O 3
I/O 4 - I/O 7
I/O 8 - I/O 11
I/O 12 - I/O 15
I/O 16 - I/O 19
I/O 20 - I/O 23
I/O 24 - I/O 27
I/O 28 - I/O 31
I/O 32 - I/O 35
I/O 36 - I/O 39
I/O 40 - I/O 43
I/O 44 - I/O 47
I/O 48 - I/O 51
I/O 52 - I/O 55
I/O 56 - I/O 59
I/O 60 - I/O 63
GOE 0, GOE 1
TQFP PIN NUMBERS
17, 18, 19, 20,
21, 22, 23, 28,
29, 30, 31, 32,
33, 34, 35, 36,
40, 41, 42, 43,
44, 45, 46, 47,
48, 53, 54, 55,
56, 57, 58, 59,
67, 68, 69, 70,
71, 72, 73, 78,
79, 80, 81, 82,
83, 84, 85, 86,
90, 91, 92, 93,
94, 95, 96, 97,
98, 3, 4, 5,
6, 7, 8, 9
66, 87
DESCRIPTION
Input/Output Pins - These are the general purpose I/O pins used by the
logic array.
Global Output Enable input pins.
Y0, Y1, Y2
RESET
11, 65, 62
15
Dedicated Clock input. This clock input is connected to one of the
clock inputs of all of the GLBs on the device.
Active Low (0) Reset pin which resets all of the registers in the device.
BSCAN
14
TDI/IN 02
16
TMS/IN 12
37
TDO/IN 22
39
TCK/IN 32
60
Input - Dedicated in-system programming enable input pin. This pin is
brought low to enable the programming mode. The TMS, TDI, TDO
and TCK options become active.
Input - This pin performs two functions. When BSCAN is logic low, it
functions as an input pin to load programming data into the device.
TDI/IN0 also is used as one of the two control pins for the JTAG state
machine. When BSCAN is high, it functions as a dedicated input pin.
Input - This pin performs two functions. When BSCAN is logic low, it
functions as a pin to control the operation of the JTAG state machine.
When BSCAN is high, it functions as a dedicated input pin.
Output/Input - This pin performs two functions. When BSCAN is logic
low, it functions as an output pin to read serial shift register data.
When BSCAN is high, it functions as a dedicated input pin.
Input - This pin performs two functions. When BSCAN is logic low, it
functions as a clock pin for the Serial Shift Register. When BSCAN is
high, it functions as a dedicated input pin.
GND
2, 13, 25, 38,
51, 63, 74, 88
Ground (GND)
VCC
VCCIO
NC1
12, 64
1, 24, 52, 75
10, 26, 27, 49,
50, 61, 76, 77,
89, 99, 100
VCC
Supply voltage for output drivers, 5V or 3.3V. All VCCIO pins must
be connected to the same voltage level.
No Connect.
1. NC pins are not to be connected to any active signals, VCC or GND.
2. Pins have dual function capability.
Table 2-0002-2064E.eps
9

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