PM5351-BI データシートの表示（PDF） - PMC-Sierra
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PM5351-BI Datasheet PDF : 393 Pages
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S/UNI-TETRA
DATASHEET
PMC-1971240
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12
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PMC-Sierra, Inc.
PM5351 S/UNI-TETRA
ISSUE 7
SATURN USER NETWORK INTERFACE (155-TETRA)
10.13.6 SONET/SDH FRAMER ............................................................. 89
10.14 SONET/SDH SECTION AND PATH TRACE BUFFERS (SSTB AND SPTB).... 89
10.14.1 RECEIVE TRACE BUFFER (RTB)............................................. 89
10.14.1.1 TRACE MESSAGE RECEIVER..................................... 89
10.14.1.2 OVERHEAD BYTE RECEIVER...................................... 90
10.14.2 TRANSMIT TRA CE BUFFER (TTB)........................................... 91
10.15 ATM UTOPIA AND PACKET OVER SONET/SDH POS-PHY SYSTEM
INTERFACES............................................................................................. 91
10.15.1 RECEIVE ATM INTERFACE ...................................................... 92
10.15.2 RECEIVE POS INTERFACE...................................................... 92
10.15.2.1 PREMATURE RPA ASSERTION.................................... 93
10.15.3 TRANSMIT ATM INTERFACE.................................................... 94
10.15.4 TRANSMIT POS INTERFACE ................................................... 95
10.16 WAN SYNCHRONIZATION CONTROLLER (WANS)..................................... 96
10.16.1 PHASE COMPARISON ............................................................. 96
10.16.1.1 PHASE REACQUISITION CONTROL ............................ 97
10.16.2 PHASE AVERAGER.................................................................. 98
10.17 JTAG TEST ACCESS PORT........................................................................ 99
10.18 MICROPROCESSOR INTERFACE .............................................................. 99
NORMAL MODE REGIS TER DESCRIPTION..........................................................108
TEST FEATURES DESCRIPTION ..........................................................................331
12.1 MASTER TEST REGISTER........................................................................331
12.2 TEST MODE 0 DETAILS ............................................................................333
12.3 JTAG TEST PORT.....................................................................................333
12.3.1
BOUNDARY SCAN CELLS ......................................................341
OPERATION .........................................................................................................344
13.1 SONET/SDH FRAME MAPPINGS AND OVERHEAD BYTE USAGE.............344
13.1.1
ATM MAPPING........................................................................344
13.1.2
PACKET OVER SONET/SDH MAPPING...................................346
13.1.3
TRANSPORT AND PATH OVERHEAD BYTES..........................348
13.2 ATM CELL DATA STRUCTURE ..................................................................356
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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