271092-005 データシートの表示（PDF） - Intel

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271092-005

80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION

Intel 

M80C287

Exception

Invalid

Operation

Denormalized

Operand

Zero Divisor

Overflow

Underflow

Inexact

Result

(Precision)

Table 7 Exceptions

Cause

Default Action

(If Exception is Masked)

Operation on a signalling NaN

unsupported format indeterminate form

(0 % 0 0 (a %) a (b %) etc ) or

stack overflow underflow (SF is also

set)

Result is a quiet NaN integer indefinite

or BCD indefinite

At least one of the operands is

denormalized i e it has the smallest

exponent but a nonzero significand

The operand is normalized and normal

processing continues

The divisor is zero while the dividend is a

noninfinite nonzero number

Result is %

The result is too large in magnitude to fit

in the specified format

Result is largest finite value or %

The true result is nonzero but too small

to be represented in the specified

format and if underflow exception is

masked denormalization causes loss of

accuracy

Result is denormalized or zero

The true result is not exactly

representable in the specified format

(e g ) the result is rounded according

to the rounding mode

Normal processing continues

default action taken by the M80C287 if the excep-

tion is masked by its corresponding mask bit in the

control word

Any exception that is not masked by the control

word sets the corresponding exception flag of the

status word sets the ES bit of the status word and

asserts the ERROR signal When the CPU attempts

to execute another ESC instruction or WAIT excep-

tion 16 occurs The exception condition must be re-

solved via an interrupt service routine The return

address pushed onto the CPU stack upon entry to

the service routine does not necessarily point to the

failing instruction nor to the following instruction The

M80C287 saves the address of the floating-point in-

struction that caused the exception and the address

of any memory operand required by that instruction

Initialization

After FNINIT or RESET the control word contains

the value 037FH (all exceptions masked precision

control 64 bits rounding to nearest) the same values

as in an 80287 after RESET For compatibility with

the M8087 and M80287 the bit that used to indicate

infinity control (bit 12) is set to zero however re-

gardless of its setting infinity is treated in the affine

sense After FNINIT or RESET the status word is

initialized as follows

 All exceptions are set to zero

 Stack TOP is zero so that after the first push the

stack top will be register seven (111B)

 The condition code C3 – C0 is undefined

 The B-bit is zero

The tag word contains FFFFH (all stack locations

are empty)

M80C286 M80C287 initialization software should

execute an FNINIT instruction (i e an FINIT without a

preceding WAIT) after RESET The FNINIT is not

strictly required for either M80287 or M80C287 soft-

ware but Intel recommends its use to help ensure

upward compatibility with other processors

M8087 and M80287 Compatibility

This section summarizes the differences between

the M80C287 and the M80287 Any migration from

the M8087 directly to the M80C287 must also take

into account the differences between the M8087

and the M80287 as listed in Appendix A

10

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