271092-005 データシートの表示（PDF） - Intel

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271092-005

80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION

Intel 

M80C287

Instruction

FPREM FPREM1

(See Table 3)

FCOM FCOMP

FCOMPP FTST

FUCOM FUCOMP

FUCOMPP FICOM

FICOMP

FXAM

FCHS FABS FXCH

FINCTOP FDECTOP

Constant Loads

FXTRACT FLD

FILD FBLD

FSTP (Ext Real)

FIST FBSTP

FRNDINT FST

FSTP FADD FMUL

FDIV FDIVR

FSUB FSUBR

FSCALE FSQRT

FPATAN F2XM1

FYL2X FYL2XP1

FPTAN FSIN

FCOS FSINCOS

FLDENV FRSTOR

FLDCW FSTENV

FSTCW FSTSW

FCLEX FINIT

FSAVE

Table 2 Condition Code Interpretation

C0 (S)

C3 (Z)

C1 (A)

Three Least Significant Bits

of Quotient

Q2

Q0

Q1

or O U

C2 (C)

Reduction

0 e Complete

1 e Incomplete

Result of Comparison

(See Table 2 4)

Zero

or O U

Operand is Not Comparable

(Table 2 4)

Operand Class

(See Table 2 5)

Sign

or O U

Operand Class

(Table 2 5)

UNDEFINED

Zero

or O U

UNDEFINED

UNDEFINED

Roundup

or O U

UNDEFINED

UNDEFINED

Roundup

or O U

Undefined

if C2 e 1

Reduction

0 e Complete

1 e Incomplete

Each Bit Loaded from Memory

UNDEFINED

OU

When both IE and SF bits of status word are set indicating a stack exception this bit distinguishes between

stack overflow (C1 e 1) and underflow (C1 e 0)

Reduction If FPREM or FPREM1 produces a remainder that is less than the modulus reduction is complete When

reduction is incomplete the value at the top of the stack is a partial remainder which can be used as input to

further reduction For FPTAN FSIN FCOS and FSINCOS the reduction bit is set if the operand at the top of

the stack is too large In this case the original operand remains at the top of the stack

Roundup When the PE bit of the status word is set this bit indicates whether one was added to the least significant bit of

the result during the last rounding

UNDEFINED Do not rely on finding any specific value in these bits

6

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