271092-005 データシートの表示（PDF） - Intel

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271092-005

80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION

Intel 

M80C287

Table 3 Condition Code Interpretation after FPREM and FPREM1 Instructions

Condition Code

C2

C3

C1

C0

Interpretation after

FPREM and FPREM1

1

X

X

X

Incomplete Reduction Further iteration required for complete

reduction

Q1

Q0

Q2

Q MOD 8

Complete Reduction C0 C3 C1 contain three

0

0

0

0

least significant bits of quotient

0

1

0

1

1

0

0

2

0

1

0

1

0

0

1

3

4

0

1

1

5

1

0

1

6

1

1

1

7

Table 4 Condition Code

Resulting from Comparison

Order

C3

C2

C0

TOP l Operand

0

0

0

TOP k Operand

0

0

1

TOP e Operand

1

0

0

Unordered

1

1

1

Table 5 Condition Code

Defining Operand Class

C3 C2 C1 C0

Value at TOP

0

0

0

0

aUnsupported

0

0

0

1

aNaN

0

0

1

0

bUnsupported

0

0

1

1

bNan

0

1

0

0

aNormal

0

1

0

1

aInfinity

0

1

1

0

bNormal

0

1

1

1

bInfinity

1

0

0

0

a0

1

0

0

1

aEmpty

1

0

1

0

b0

1

0

1

1

bEmpty

1

1

0

0

aDenormal

1

1

1

0

bDenormal

CONTROL WORD

The NPX provides several processing options that

are selected by loading a control word from memory

into the control register Figure 5 shows the format

and encoding of fields in the control word

The low-order byte of this control word configures

exception masking Bits 5 – 0 of the control word

contain individual masks for each of the six excep-

tions that the M80C287 recognizes

The high-order byte of the control word configures

the M80C287 operating mode including precision

rounding and infinity control

 The ‘‘infinity control bit’’ (bit 12) is not meaningful

to the M80C287 and programs must ignore its

value To maintain compatibility with the M8087

and M80287 this bit can be programmed howev-

er regardless of its value the M80C287 always

treats infinity in the affine sense (b % k a %)

This bit is initialized to zero both after a hardware

reset and after the FINIT instruction

 The rounding control (RC) bits (bits 11–10) pro-

vide for directed rounding and true chop as well

as the unbiased round to nearest even mode

specified in the IEEE standard Rounding control

affects only those instructions that perform

rounding at the end of the operation (and thus

can generate a precision exception) namely

FST FSTP FIST all arithmetic instructions (ex-

cept FPREM FPREM1 FXTRACT FABS and

FCHS) and all transcendental instructions

 The precision control (PC) bits (bits 9–8) can be

used to set the M80C287 internal operating preci-

sion of the significand at less than the default of

64 bits (extended precision) This can be useful in

providing compatibility with early generation arith-

metic processors of smaller precision PC affects

only the instructions ADD SUB DIV MUL and

SQRT For all other instructions either the preci-

sion is determined by the opcode or extended

precision is used

7

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