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QLX111GRX データシートの表示(PDF) - Intersil

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QLX111GRX
Intersil
Intersil Intersil
QLX111GRX Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
QLx111GRx
Ordering Information
PART NUMBER
(Note)
PART MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG. DWG. #
QLX111RIQT7
QL111
0 to +70
16 Ld QFN
7” Prod. Tape & Reel; Qty 1,000
L16.3x3B
QLX111RIQSR
QL111
0 to +70
16 Ld QFN
7” Sample Reel; Qty 100
L16.3x3B
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb
and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pin Configuration
QLx111GRx
(16 LD QFN)
TOP VIEW
16 15 14 13
VDD 1
IN[P] 2
12 VDD
11 OUT[P]
IN[N] 3
10 OUT[N]
VDD 4
9 VDD
5678
Pin Descriptions
PIN NAME
VDD
IN[P,N]
CP[A,B]
OUT[P,N]
LOS
DT
GND
PIN
NUMBER
DESCRIPTION
1, 4, 12, 9 Power supply. 1.2V supply voltage. The use of parallel 100pF and 10nF decoupling capacitors to
ground is recommended for each of these pins for broad high-frequency noise suppression.
2, 3
Equalizer 1 differential input, CML. The use of 100nF low ESL/ESR MLCC capacitor with at least
6GHz frequency response is recommended.
6, 7
Control pins for setting the equalizer. CMOS logic inputs. Pins are read as a 2-digit number to set
the boost level. Pins are internally pulled up and down through a 23kΩ resistor.
11, 10
Equalizer differential output, CML. The use of 100nF low ESL/ESR MLCC capacitor with at least
6GHz frequency response is recommended.
14
LOS indicator. High output when equalized In signal is below DT threshold. Open drain output
internally pulled up to VDD with a 10kΩ resistor.
15
Detection Threshold. Reference DC voltage threshold for input signal power detection. Data output
OUT is muted when the power of the equalized version of IN falls below the threshold. Tie to ground
to disable electrical idle preservation and always enable the limiting amplifier.
5, 8, 13, 16 Ground
2
FN6987.0
October 26, 2009

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