R8A66170SP データシートの表示（PDF） - Renesas Electronics

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R8A66170SP

4-CH 16-BIT PWM GENERATOR

Renesas Electronics 

R8A66170DD/SP

(3) Mode 2

This mode is selected by writing D4 = 1 and D3 = 0 in command 1. Fig.11 shows the block diagram of this mode (for

one channel).

The high-level pulse value M is set to the H register of PWM in Mode 0 and 1, but in this mode, the high-level pulse

value M is set to the H register of PWM and the low-level pulse value N is set to the L register of PWM. Therefore, the

pulse width and cycle time T of PWM output are determined by value L of the prescaler register and values M and N of

H and L registers of PWM. (See Fig.7)

Oscillator source

1

f (XIN)

Internal signal

Prescaler output

(PWM clock)

(at L = 1)

PWM output

M=0

"L"

N=3

M=1

N=3

M=2

N=3

M=3

N=3

・・・

M=65535

N=3

L+1

f (XIN)

M=3

N=0

M=3

N=1

M=3

N=2

M=3

N=3

・・・

M=3

N=65535

"H"

L+1

f (XIN) ・M

L+1

f (XIN) ・N

T=

f

L+1

(XIN)

・(M+N)

Fig.7 (When H width polarity is “H”)

T :Cycle time (μs)

f(XIN) :Oscillator frequency (MHz)

L :Prescaler set value

M :Ｈ width set value

N :L width set value

REJ03F0272-0100 Rev.1.00 Apr.01.2008

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