R8A66174SP データシートの表示（PDF） - Renesas Electronics

部品番号

コンポーネント説明

メーカー

R8A66174SP

PARALLEL-IN SERIAL-OUT DATA BUFFER WITH FIFO

Renesas Electronics 

R8A66174SP

BASIC OPERATION

Fig. 1 shows the basic operation flowchart. Data

inputs D0~D7 are switched among four commands

and 8-bit parallel data by the C//D signal. When

C//D is 1, the command is stored in sync with the

rise of /WR.

For initiate to work this IC, at first command 1

should be stored. Command 1 sets the division ratio

for clock input Φ as 5 divisions of 1, 1/2, 1/4, 1/8

and 1/16. (The default ratio is 1.)

Then command 2 should be stored. When it is

stored, 8-bit parallel data is written into the internal

memory (FIFO) on the write cycle of the CPU. The

maximum capacity of its FIFO is 63 bytes.

When the write operation has done, command 3

should be stored. For this action, all data in the

internal memory is outputted as serial data (SDATA)

in sync with the shift clock (SCLK output) which is

set by command 1. Then, each data is outputted

from LSB.

The SDATA changes on the fall of SCLK. When it

finishes to output data, an interrupt request /INT is

outputted to the CPU.

/INT is canceled by command 4 or command 2 and

command 3. The command 4 sets/resets two

control ports (LATCH, /OE) as well as canceling

/INT. If command 3 is executed without executing

command 2 after command 4, the already written-in

data can be re-outputted. If it is not required to

re-output the previous data, please execute

command 2 before command 3 will be executed.

<Attention>

In spite of having stored write mode by command

2, when serial out mode is stored by command 3,

without writing any parallel data to an internal

memory (FIFO), an incorrect output appears in

SDATA, SCLK, and /INT.

Please be careful.

(command 2 store data is not written command 3 store :

Please avoid such usage. )

C/D=1

Reset

Command 1 store

C/D=1

Division ratio setting

Command 2 store

C/D=0

Repeat output

C/D=1

Write operation

1 w rite cycle/byte

End?

YES

NO

(MAX : 63 Byte)

Command 3 store

SERIAL OUTPUT

NO

End?

YES

Interrupt request out

C/D=1

Command 4 store

(Cancel interrupt request)

LATCH output

C/D=1

Interrupt

f rom

others

C/D=1

Command 4 store

OE output

Command 4 store

Cancel LATCH, OE

Repeat data

YES

output?

NO

REJ03F0278-0101 Rev.1.01 Oct.06.2008

Page 3 of 11

Fig. 1 Flowchart (Basic operation)

Share Link: