RA8815 データシートの表示（PDF） - RAIO
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RA8815 Datasheet PDF : 6 Pages
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Preliminary Version 2.1
RA8815
128x33 Character/Graphic LCD Driver
Parallel/Serial Select
P/ S
I
P/ S = 0 The MPU interface is serial mode(Default). See the setting of
DB[7:6].
P/ S = 1 The MPU interface is parallel mode.
5-2 LCD Panel Interface
Pin Name
I/O
Description
SEG0 ~ SEG127 O Segment Signals for Panel
COM0 ~ COM31 O Common Signals for Panel
COMS_A[1:0]
COMS_B[1:0]
O Icon Common Signals for Panel
DUM_L
DUM_R
O Dummy PAD
5-.3 Clock and Power
Pin Name
I/O
RA, RB
I
V0~V4
O
C1P, C1M
I
C2P, C2M
I
VLCD
O
VREF
I
VREG
I
CLK_SEL
I
EXT_CLK
I
VDD
VDDP
P
GND
GNDP
P
Description
Resister Input
These are used to connect a resistor for internal oscillator.
Voltage Source of LCD Driver
The relationship of the power is VLCD>VREG≧V0≧V1≧V2≧V3≧V4≧
VSS。
Capacitor Input
These are used to connect a capacitor for internal Booster.
Capacitor Input
These are used to connect a capacitor for internal Booster.
Booster Output
Reference Voltage Input
This is the refeence voltage input when use an external regulator.
Voltage Regulator Output
When the internal voltage regulator is disable, this pin is connect to
VLCD and used to generate V0~V4.
Clock Select
This pin is used to select the clock source. When CLK_SEL “1”, the clock
is generated by internal oscillator and the external resistor that connect
on RA and RB. When CLK_SEL is “0”, the system clock is drive by
external pin - EXT_CLK.
External Clock
When CLK_SEL is “0”, this pin is the external clock input. When
CLK_SEL is “1”, this pin do not used and has to connect VDD or GND.
VDD Power
Ground
RAiO TECHNOLOGY INC.
5/6
www.raio.com.tw
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