RF2938 データシートの表示（PDF） - RF Micro Devices

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RF2938

2.4GHZ SPREAD-SPECTRUM TRANSCEIVER

RF Micro Devices 

RF2938

Theory of Operation

RECEIVER

RX IF AGC/Mixer

The front end of the IF AGC starts with a single-ended

input and a constant gain amp of 15dB. This first amp

stage sets the noise figure and input impedance of the

IF section, and its output is taken differentially. The rest

of the signal path is differential until the final baseband

output, which is converted back to single-ended. Fol-

lowing the front end amp are multiple stages of vari-

able gain differential amplifiers, giving the IF signal

path a gain range of 9dB to 52dB. The noise figure (in

max gain mode) of the IF amplifiers is 5dB, which

should not degrade the system noise figure.

The IF to BB mixers are double-balanced, differential

in, differential out, mixers with 5dB conversion gain.

The LO for each of these mixers is shifted 90° so that

the I and Q signals are separated in the mixers.

11

RX Baseband Amps, Filters, Data Slicers, and DC

Feedback

At baseband frequency, there are multiple AGC amplifi-

ers offering a gain range of 0dB to 30dB. Following

these amplifiers are fully integrated gm-C low pass fil-

ters to further filter out-of-band signals and spurs that

get through the SAW filter, anti-alias the signal prior to

the A/D converter, and to band-limit the signal and

noise to achieve optimal signal-to-noise ratio. The 3dB

cut-off frequency of these low pass filters is program-

mable with a single external resistor, and continuously

variable from 1MHz to 35MHz. A five-pole Bessel type

filter response was chosen because it is optimal for

data systems due to its flat delay response and clean

step response. Butterworth and Chebychev type filters

ring when given a step input making them less ideal for

data systems.

The filter outputs, with +6dBm gain, drive the linear

500mVPP signal off-chip, but also connect internally to

a data slicer which squares up the signal to CMOS lev-

els, and drives this “data” signal off-chip. This data

slicer is a high speed CMOS comparator with 30mV of

hysteresis and self-aligned input DC offset. This data

slicer can be independently disabled if only the linear

outputs are desired.

DC feedback is built into the baseband amplifier sec-

tion to correct for input offsets. Large DC offsets can

arise when a mixer LO leaks to the mixer input and

then mixes with itself. DC offsets can also result from

random transistor mismatches. A large external capac-

itor is needed for the DC feedback to set the high pass

2-10

cutoff, and this capacitor is reused to set the DC input

level for the self-aligned data slicer.

RSSI and VGC Operation

The receive signal path also has an RSSI output which

is the sum of both the I and Q channels. The RSSI has

about 60dBm of dynamic range and the RSSI charac-

teristic is optimized to give best linearity and dynamic

range at a VGC setting of 1.4V. It is recommended that

the system sets VGC to 1.4V to take an RSSI reading

to make channel activity and signal level decisions,

then adjusts VGC to obtain optimum dynamic range

from the IOUT and QOUT outputs.

LO Input Buffers

RF LO Buffer

The RF LO input has a limiting amplifier before the

mixer on both the RF2444 (RX) and RF2938 (TX). This

limiting amplifier design and layout is identical on both

ICs, which will make the input impedance the same as

well. Having this amplifier between the VCO and mixer

minimizes any reverse effect the mixer has on the

VCO, expands the range of acceptable LO input levels,

and holds the LO input impedance constant when

switching between RX and TX. The LO input power

range is -18dBm to +5dBm, which should make it easy

to interface to any VCO and frequency synthesizer.

IF LO Buffer

The IF LO input has a limiting amplifier before the

phase splitting network to amplify the signal and help

isolate the VCO from the IC. Also, the LO input signal

must be twice the desired intermediate frequency. This

simplifies the quadrature network and helps reduce the

LO leakage onto the RX_IF input pin (since the LO

input is now at a different frequency than the IF). The

amplitude of this input needs to be between -15dBm

and 0dBm. Excessive IF LO harmonic content affects

phase balance of the modulator and demodulator so it

is recommended that a simple n=3 low pass filter is

included between VCO and IF LO input. The IF LO

input requires a DC bias current of +6.5µA. This can

be accomplished with a 270kΩ resistor to VCC for 3.3V

operation. Failing to provide this will cause a phase

imbalance in the IF LO quadrature divider of up to 8°,

which in turn causes a similar imbalance in the I/Q out-

puts and the TX modulator.

Rev A8 010418

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