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HIP4086(2015) データシートの表示(PDF) - Intersil

部品番号
コンポーネント説明
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HIP4086
(Rev.:2015)
Intersil
Intersil Intersil
HIP4086 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HIP4086, HIP4086A
Block Diagram (for clarity, only one phase is shown)
xHI 5
DIS 10
VDD 20
UVLO 8
RFSH 9
xLI 4
RDEL 7
If undervoltage is active or if
DIS is asserted, the high and
DRIVE ENABLE
low-side drivers are turned off.
COMMON WITH
ALL PHASES
10ns
DELAY
ADJUSTABLE
TURN-ON
DELAY
UNDERVOLTAGE
DETECTOR
VDD
CHARGE
PUMP*
EN
LEVEL
SHIFTER
*The charge pump is
permanently disabled
in the HIP4086A.
REFRESH
PULSE
COMMON
WITH ALL
PHASES
DELAY DISABLE COMMON WITH
ALL PHASES
ADJUSTABLE
TURN-ON
DELAY
COMMON WITH
ALL PHASES
VDD
2µs Delay
16 xHB
17 xHO
18 xHS
21 xLO
6 VSS
100mV
If the voltage on RDEL is less than 100mV, the
turn-on delay timers are disabled and the high and
low-side drivers can be turned on simultaneously.
Truth Table
INPUT
ALI, BLI, CLI
AHI, BHI, CHI
UV
X
X
X
X
X
1
1
X
0
0
0
0
0
1
0
1
0
0
NOTE: X signifies that input can be either a “1” or “0”.
OUTPUT
DIS
RDEL
ALO, BLO, CLO
AHO, BHO, CHO
1
X
0
0
X
X
0
0
0
>100mV
1
0
0
X
0
1
0
X
0
0
0
<100mV
1
1
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2
FN4220.10
March 27, 2015

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