RT8020PQW データシートの表示（PDF） - Richtek Technology
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RT8020PQW Datasheet PDF : 14 Pages
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RT8020
The output ripple is highest at maximum input voltage
since ∆IL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long-term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 3.
VOUT
R1
FB
RT8020
R2
GND
Figure 3. Setting the Output Voltage
DS8020-03 August 2007
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
VOUT = VREF x (1+ R1/R2)
Where VREF is the internal reference voltage (0.6V typical)
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses: VIN quiescent current and I2R
losses.
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1.The VIN quiescent current oppears due to two
components : the DC bias current and the gate charge
currents. The gate charge current results from switching
the gate capacitance of the internal power MOSFET
switches. Each time the gate is switched from high to
low to high again, a packet of charge ∆Q moves from VIN
to ground.
The resulting ∆Q/∆t is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
IGATECHG = f(QT + QB)
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch
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