RT9612A データシートの表示（PDF） - Richtek Technology
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RT9612A Datasheet PDF : 15 Pages
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RT9612A/B
VIN
BOOT
UGATE
PHASE
VCC
CB
+
VCB
-
LGATE
GND
Figure 2. Part of Bootstrap Circuit of RT9612A/B
In practice, a low value capacitor CB will lead to the over
charging that could damage the IC. Therefore, to minimize
the risk of overcharging and to reduce the ripple on VCB,
the bootstrap capacitor should not be smaller than 0.1μF,
and the larger the better. In general design, using 1μF can
provide better performance. At least one low-ESR capacitor
should be used to provide good local de-coupling. It is
recommended to adopt a ceramic or tantalum capacitor.
Power Dissipation
To prevent driving the IC beyond the maximum
recommended operating junction temperature of 125°C,
it is necessary to calculate the power dissipation
appropriately. This dissipation is a function of switching
frequency and total gate charge of the selected MOSFET.
Figure 3 shows the power dissipation test circuit. CL and
CU are the UGATE and LGATE load capacitors,
respectively. The bootstrap capacitor value is 1μF.
10
12V
CBOOT
1µF
12V
1µF
PWM
BOOT
VCC UGATE
RT9612A/B
PHASE
PWN LGATE
GND
2N7002
CU
3nF
2N7002
20
CL
3nF
Figure 3. Test Circuit
Figure 4 shows the power dissipation of the RT9612A/B
as a function of frequency and load capacitance. The value
of CU and CL are the same and the frequency is varied
from 100kHz to 1MHz.
Power Dissipation vs. Frequency
1000
900
800
CU = CL = 3nF
700
600
CU = CL = 2nF
500
400
300
200
CU = CL = 1nF
100
0
0
200
400
600
800
1000
Frequency (kHz)
Figure 4. Power Dissipation vs. Frequency
The operating junction temperature can be calculated from
the power dissipation curves (Figure 4). Assume
VCC = 12V, operating frequency is 200kHz and CU = CL =
1nF which emulate the input capacitances of the high side
and low side power MOSFETs. From Figure 4, the power
dissipation is 100mW. Thus, for example, with the SOP-
8 package, the package thermal resistance θJA is 120°C/
W. The operating junction temperature is then calculated
as :
TJ = (120°C/W x 100mW) + 25°C = 37°C
(11)
where the ambient temperature is 25°C.
Thermal Considerations
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 packages, the thermal resistance, θJA, is
120°C/W on a standard JEDEC 51-7 four-layer thermal
test board. For SOP-8 (Exposed Pad) packages, the
thermal resistance, θJA, is 75°C/W on a standard JEDEC
51-7 four-layer thermal test board. For WDFN-8EL 3x3
packages, the thermal resistance, θJA, is 70°C/W on a
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS9612A/B-03 June 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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