S24C01A データシートの表示（PDF） - Seiko Instruments Inc
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S24C01A Datasheet PDF : 23 Pages
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CMOS 2-WIRED SERIAL EEPROM
S-24C01A/02A/04A
Rev. 2.2_30
4. Acknowledgment
The unit of data transmission is 8 bits. By turning the SDA line "L," the slave device mounted on the
system bus which receives the data during the 9th clock cycle outputs the acknowledgment signal
verifying the data reception.
When the EEPROM is rewriting, the device does not output the acknowledgment signal.
SCL
(EEPROM Input)
1
8
9
SDA
(Master Output)
SDA
(EEPROM Output)
Start
Condition
Acknow-
ledgment
Output
tAA
tDH
Figure 8 Acknowledgment Output Timing
5. Device Addressing
To perform data communications, the master device mounted on the system outputs the start condition
signal to the slave device. Next, the master device outputs 7-bit length device address and a 1-bit length
read/write instruction code onto the SDA bus.
Upper 4 bits of the device address are called the "Device Code," and set to "1010." Successive 3 bits are called the
"Slave Address." It is used to select a device on the system bus, and compared to the predetermined address value
at the address input pin (A2, A1, or A0).
When the comparison results match, the slave device outputs the acknowledgment signal during the 9th clock
cycle.
Device Code
Slave Address
S-24C01A
1
0
1
0
A2 A1 A0 R/W
S-24C02A
1
0
1
MSB
Device Code
0
A2 A1 A0 R/W
Slave
Address
Page
LSB
Address
S-24C04A
1
0
1
0
A2 A1 P0 R/W
MSB
LSB
Figure 9 Device Address
In the S-24C04A, "A0" does not exist in the slave addresses. So, "A0" becomes "P0." "P0" is a page address bit and
is equivalent to an additional uppermost bit of the word address. Accordingly, when P0="0," the former half area
corresponding to 2 kbits (addresses from 000h to 0FFh) in the entire memory are selected; when P0="1," the latter
half area corresponding to 2 kbits (addresses from 100h to 1FFh) in all areas of the memory are selected.
8
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