S1R72U01 データシートの表示（PDF） - Seiko Epson Corp

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S1R72U01

USB 2.0 host/device bridge LSI supporting USB 2.0 FS/LS

Seiko Epson Corp 

4. Functions

4. Functions

4.1 Serial I/F (UART)

The S1R72U01 is connected to the main CPU via UART (2-wire asynchronous system). Set the SPIxUART

mode setting pin to Low.

The interface voltage (CVDD) can be used across a broad range, from 1.8 to 5.0 V.

• UART connection (asynchronous serial I/F)

Initial baud rate: 300/9600 bps (set by mode setting pin INIT_BAUD)

Baud rate: Settable (max. 3 Mbps)

lsb first

8-bit data

1/2 stop bit

Odd/Even/No parity

4.2 USB Host SIE

The USB host function complies with the USB 2.0 (Universal Serial Bus Specification Revision 2.0) standard. It

supports FS (12 Mbps) and LS (1.5 Mbps) speed modes. The USB functions are controlled by the Bridge

Sequencer block inside the LSI. The USB class supported is the Human Interface Device Class.

4.3 USB Device SIE

The USB device function complies with the USB 2.0 (Universal Serial Bus Specification Revision 2.0) standard.

It supports FS (12 Mbps) and LS (1.5 Mbps) speed modes. The USB function is controlled by the Bridge

Sequencer block inside the LSI. The USB class supported is the Human Interface Device Class.

4.4 Transceiver Macro

This is a USB analog macro block shared by host and device.

4.5 FIFO

This FIFO block serves as a buffer for data between the serial interface and the USB.

4.6 Bridge Sequencer

This controls the USB functions based on commands from the serial interface.

4.7 SIO

This block is used to display the history of the product (system) development support functions and for analog

tests.

4

Seiko Epson Corporation

S1R72U01 Data Sheet

(Rev. 1.20)

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