S1R72U01 データシートの表示（PDF） - Seiko Epson Corp

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S1R72U01

USB 2.0 host/device bridge LSI supporting USB 2.0 FS/LS

Seiko Epson Corp 

4. Functions

4.8 Debug I/F

This is a debugging pin for the built-in Bridge Sequencer. It is not intended for use by the user and should be

disregarded.

4.9 1.8-V Regulator

This regulator generates 1.8-V internal core voltage. The range of input voltages is from 3.3 to 5.0 V.

4.10 3.3-V Regulator

This regulator generates 3.3 V for the USB. The range of input voltages is from 3.3 to 5.0 V.

4.11 VBUS SW

This is a VBUS output block built into the LSI.

4.12 Test Circuit

This is a circuit for IC tests. It is not intended for use by the user and should be disregarded.

S1R72U01 Data Sheet

Seiko Epson Corporation

5

(Rev. 1.20)

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