FL208KIF データシートの表示（PDF） - Spansion Inc.

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FL208KIF

8-Mbit 3.0V Serial Flash Memory with Uniform 4 kB Sectors

Spansion Inc. 

Data Sheet (Preliminary)

3. Signal Descriptions

Serial Data Input / Output (SI/IO0)

The SPI Serial Data Input/Output (SI/IO0) pin provides a means for instructions, addresses and data to be

serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (SCK) input

pin. The SI/IO0 pin is also used as an output pin when the Fast Read Dual Output instruction is executed.

Serial Data Output (SO)

The SPI Serial Data Output (SO) pin provides a means for data and status to be serially read from (shifted out

of) the device. Data is shifted out on the falling edge of the Serial Clock (SCK) input pin.

Serial Clock (SCK)

The SPI Serial Clock Input (SCK) pin provides the timing for serial input and output operations. See SPI

Modes on page 11.

Chip Select (CS#)

The SPI Chip Select (CS#) pin enables and disables device operation. When CS# is high the device is

deselected and the Serial Data Output pins are at high impedance.

When deselected, the device’s power consumption will be at standby levels unless an internal erase, program

or status register cycle is in progress. When CS# is brought low the device will be selected, power

consumption will increase to active levels and instructions can be written to and data read from the device.

After power-up, CS# must transition from high to low before a new instruction will be accepted.

HOLD (HOLD#)

The HOLD# pin allows the device to be paused while it is actively selected. When HOLD# is brought low,

while CS# is low, the SO pin will be at high impedance and signals on the SI and SCK pins will be ignored

(don’t care). The HOLD# function can be useful when multiple devices are sharing the same SPI signals.

Write Protect (WP#)

The Write Protect (WP#) pin can be used to prevent the Status Register from being written. Used in

conjunction with the Status Register’s Block Protect (BP0, BP1 and BP2, BP3) bits and Status Register

Protect (SRP) bits, a portion or the entire memory array can be hardware protected.

Table 3.1 Pin Descriptions

Symbol

SCK

SI/IO0

SO

CS#

WP#

HOLD#

VCC

GND

Pin Name

Serial Clock Input

Serial Data Input / Output (1)

Serial Data Output

Chip Enable

Write Protect

Hold Input

Supply Voltage (2.7-3.6V)

Ground

Note:

1. SI/IO0 output is used for Dual Output Read instruction.

8

S25FL208K

S25FL208K_00_05 August 14, 2012

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