S2R72V27F14 データシートの表示（PDF） - Seiko Epson Corp

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S2R72V27F14

Supports HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps) transfer

Seiko Epson Corp 

4. Explanation of Functions

4.2 Reset

This LSI includes a hard reset function using the external XRESET terminal and a soft reset function

using register settings.

4.2.1

Hard Reset

Start up from reset status when power is turned on, then cancel the reset after confirming

power on.

4.2.2

Soft Reset

Circuits related to the USB port or individual internal USB analog macros can be reset via

software. This LSI can be soft reset using the ChipReset.AllReset bit. The

ChipReset.ResetMTM bit is used to reset USB analog macros. Note, however, that analog

macros should only be reset in the sleep state.

4.3 Clock

This LSI contains an internal oscillator and feedback resistor (1 MΩ) and supports clock generation

using an external oscillator. External clock input is supported via the CLKIN terminal.

The oscillator frequency supports 12 MHz or 24 MHz using the internal oscillator. Frequencies of 12,

24, or 48 MHz are supported via the external input.

Fig. 4.2 shows a typical connection arrangement for an oscillation circuit. Contact the oscillator

manufacturer to determine circuit constants, as Cd, Cg, and Rd in the oscillator circuit must be

matched, based on the oscillator.

Cd

Cg

Rd

XO

XI

Fig. 4.2 Clock generation using the internal oscillator and external oscillator

S2R72V27 Data Sheet (Rev. 1.00)

EPSON

5

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