S6A0079 データシートの表示（PDF） - Samsung

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S6A0079

34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD

Samsung 

34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD

S6A0079

TIMING GENERATION CIRCUIT

Timing generation circuit generates clock signals for the internal operations.

ADDRESS COUNTER (AC)

Address Counter (AC) stores DDRAM/CGRAM address, transferred from IR. After writing into (reading from)

DDRAM/CGRAM, AC is automatically increased (decreased) by 1. When RS = "Low" and R/W = "High", AC can

be read through DB0 - DB6.

CURSOR/BLINK CONTROL CIRCUIT

It controls cursor/blink ON/OFF and black/white inversion at cursor position.

LCD DRIVER CIRCUIT

LCD Driver circuit has 34 common and 120 segment signals for LCD driving. Data from CGRAM/CGROM is

transferred to 120-bit segment latch serially, which is stored to 120-bit shift latch. When each common is selected

by 34-bit common register, segment data also output through segment driver from 120-bit segment latch. In case

of 2-line or 4-line mode, COM0-COM33 have 1/33 duty ratio. COM0 (COM33) makes the data of CGRAM (Icon

RAM) enable to display icons.

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