74LVC823A データシートの表示（PDF） - Philips Electronics
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74LVC823A
Philips Electronics
74LVC823A Datasheet PDF : 12 Pages
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Philips Semiconductors
9-bit D-type flip-flop with 5-volt tolerant
inputs/outputs; positive-edge trigger (3-State)
Product specification
74LVC823A
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V.
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V
VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V
VI
CP INPUT
GND
VOH
QnOUTPUT
VOL
1/fmax
VM
tW
tPHL
VM
tPLH
SA00423
Figure 1. Clock (CP) to output (Qn) propagation delays, the
clock pulse width and the maximum clock pulse frequency.
VI
OE INPUT
GND
VCC
OUTPUT
LOW–to–OFF
OFF–to–LOW
VOL
VOH
OUTPUT
HIGH–to–OFF
OFF–to–HIGH
GND
VM
tPLZ
tPZL
VX
tPHZ
VY
outputs
enabled
VM
tPZH
outputs
disabled
VM
outputs
enabled
SA00424
Figure 2. 3-State enable and disable times.
VI
CP INPUT
VM
GND
tsu
tsu
th
th
VI
ÉÉÉÉÉÉÉÉÉÉÉ Dn,CE INPUT
VM
ÉÉÉÉÉÉÉÉÉÉÉ GND
VOH
Qn OUTPUT
VM
VOL
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
SA00425
Figure 3. Data setup and hold times for the Dn input and CE
input to the CP input.
CP INPUT
MR INPUT
trem
tw
tPHL
Qn OUTPUT
SA00519
Figure 4. Master reset pulse width, master reset to clock
removal time, master reset to output propagation delay.
TEST CIRCUIT
PULSE
VI
GENERATOR
VCC
D.U.T.
RT
VO
CL 50pF
S1
500Ω
2 x VCC
Open
GND
500Ω
VCC
t 2.7V
2.7V – 3.6V
VI
VCC
2.7V
Test
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2 x VCC
GND
SY00003
Figure 5. Load circuitry for switching times.
1998 Sep 24
8
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