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SA637 データシートの表示(PDF) - Philips Electronics

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SA637
Philips
Philips Electronics Philips
SA637 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Philips Semiconductors RF Communications Products
Low-voltage digital IF receiver
Product specification
SA637
AC ELECTRICAL CHARACTERISTICS (Continued)
SYMBOL PARAMETER
TEST CONDITIONS
RF RSSI output
RSSI range
RSSI accuracy
RSSI ripple
RSSI speed
Rise time
RSSI speed
Fall time
IF input impedance
IF output impedance
Limiter input impedance
Limiter output impedance
Limiter output signal level
Limiter output DC level
Differential output matching
Differential output offset
RF level = -118dBm
RF level = -68dBm
RF level = -28dBm
No interstage filter
With interstage filter
No interstage filter
With interstage filter
(Pin 10, Pin 11)
(Pin 10, Pin 11) 1.5kAC load
LIMITS
MIN
TYP MAX
.01
0.2
.65
.4
0.9
1.7
1.0
1.7
2.3
90
±1.5
30
UNITS
V
V
V
dB
dB
mVP-P
2.5
µs
22
µs
10
µs
50
µs
1.5
k
1.5
k
1.5
k
200
280
mVP-P
1.27
V
±6
mV
±30
mV
CIRCUIT DESCRIPTION
Mixer
The mixer has a balanced input and is
capable of being driven single-ended. The
input impedance is 2.5kin parallel with a
2.2pF cap at 90MHz RF. The mixer output
can drive a 1500ceramic filter at 455kHz or
600kHz directly without any matching
required. The mixer conversion power gain is
7dB when both input and output are matched
and optimum LO level is used to drive the
internal mixer core.
Oscillator and Buffer
The on-board oscillator supplies the signal for
the mixer down-conversion. The internally
biased transistor can be configured as a
Colpitts or Butler overtone crystal oscillator.
The transistor’s bias current can be
increased if desired by adding a shunt
resistor from Pin 3 to ground. The oscillator’s
buffered output (Pin 5) can be used as a
feedback signal to lock the oscillator to an
appropriate reference.
IF Amplifier and IF Limiter
The IF strip provides more than 95dB of
power gain for the down converted signal. Its
overall bandwidth is limited to 2MHz. The
input and output impedance of the IF
amplifier and the input impedance of the IF
limiter are set to 1500(match to 455kHz
filter). A second filter is connected between
the IF amplifier and the limiter for improved
channel selectivity and reduced instability.
This ceramic filter provides 3dB interstage
insertion loss which results in optimal RSSI
linearity. The overall gain can be reduced if
desired by adding an external attenuator after
the IF amplifier. The differential limiter
outputs (Pins 10 and 11) are available for
demodulator circuits.
RSSI
The received signal strength indicator
provides a linear voltage indication of the
received signal strength in dB for a range in
excess of 90dB. The response time to a
change in input signal is less than a few
microseconds and the delay is kept to a
minimum because of the use of a minimum
phase shift circuit. Because of the speed of
the RSSI circuit, the RSSI rise and fall time
may, in practice, be dominated by the
bandwidth of the external bandpass filter that
is placed between the mixer and the IF, and
the external filter placed between the IF
amplifier and limiter. Since the RSSI function
requires the signal to propagate through the
whole IF strip, and the rise and fall time of the
filters are inversely proportional to their
bandwidth, there is a trade-off between
channel selectivity and RSSI response. A
possible solution is to use a second SA637
with wider band external filters for faster
RSSI response.
The RSSI curve is temperature compensated
and in addition is designed for improved
consistency from unit to unit.
The RSSI circuit drives an on-chip low power
op amp with rail-to-rail output which can be
connected as a unity gain RSSI buffer or a
gain stage or even a comparator.
DC Power Supply
The IC is designed for operation between 2.7
and 5.5V. A power supply dependent biasing
scheme is used in the mixers to benefit from
the large headroom available at higher VCCs.
October 27, 1993
4

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