SAA5249 データシートの表示（PDF） - Philips Electronics

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SAA5249

Integrated VIP and Teletext with Background Memory Controller (IVT1.1BMCX)

Philips Electronics 

Philips Semiconductors

Integrated VIP and Teletext with

Background Memory Controller

Preliminary specification

SAA5249

PINNING

SYMBOL

n.c.

n.c.

VDD1

OSCOUT

OSCIN

GNDO

VSS1

REF+

BLACK

CVBS

IREF

VDD2

POL

STTV/LFB

VCR/FFB

VSS2

REF−

R

G

B

RGBREF

BLANK

VSS3

CAS0

CAS1

A4

A3

COR

ODD/EVEN

PIN

SOT240-1 SOT319-1(1)

1

1

2

2

3

25

4

27

5

28

6

29

7

12

8

32

9

35

10

36

11

37

12

38

13

39

14

40

15

42

16

30

−

31

17

49

18

50

19

51

20

52

21

53

22

54, 55

23

56

24

57

25

58

26

59

27

60

28

61

DESCRIPTION

not connected

not connected

+5 V supply

27 MHz crystal oscillator output

27 MHz crystal oscillator input

0 V crystal oscillator ground

0 V ground

positive reference voltage; this pin should be connected to ground via a

100 nF capacitor

video black level storage pin; this pin should be connected to ground via a

100 nF capacitor

composite video input pin; a positive-going 1 V (p-p) input is required,

connected via a 100 nF capacitor

reference current input pin; connected to ground via a 27 kΩ resistor

+5 V supply

STTV/LFB/FFB polarity selection pin

sync to TV output pin/line flyback input pin; function controlled by an

internal register bit (scan sync mode)

PLL time constant switch/field input pin; function controlled by an internal

register bit (scan sync mode)

0 V ground

negative reference voltage; this pin should be connected to REF+ via a

100 nF capacitor

dot rate character output of the RED colour information

dot rate character output of the GREEN colour information

dot rate character output of the BLUE colour information

input DC voltage to define the output high level on the RGB pins

dot rate fast blanking output

0 V ground; internally connected for SOT319

column address select to external DRAM for BMCX function

column address select to external DRAM for BMCX function for second

DRAM where two 256 k × 4 devices are used

address output to external DRAM for BMCX function

address output to external DRAM for BMCX function

programmable output to provide contrast reduction of the TV picture for

mixed text and picture displays or when viewing newsflash/subtitle pages;

open drain output

25 Hz output synchronized with the CVBS input field sync pulses to

produce a non-interlaced display by adjustment of the vertical deflection

currents

1996 Nov 07

4

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